Item
' F5 l( D1 s% d6 W( V | SH77722 (SH-NaviJ2) Specifications
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Type name0 m1 Q2 }- T5 U# M
| R8A77722DA01BGV/ K5 u& N/ o3 I' q7 J
| R8A77722DA02BGV; }- `, s" d) b; g
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Power supply voltage" {% y9 r6 n/ e/ H" _6 {
| 1.15 to 1.3 V (internal), . B6 B* m5 B) K; W p" b% U3 Q& T
3.3 V and 1.8 V (external), @2 |, e3 A/ R- E
| 1.2 to 1.35 V (internal),
9 t6 _9 X; B+ c3 x( D7 e# h3.3 V and 1.8 V (external)
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Maximum operating frequency
* N% y: @. a2 K2 L$ p | 336 MHz
# b: M+ ]+ {5 E$ J( Z1 c- l( A | 400 MHz. f+ A: s9 Z+ P9 u7 L
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Processing performance
$ H' v- ?$ J5 M* K5 x& I# c: A. W | 600MIPS, 2.3GFLOPS
- S1 d2 g& X% h8 S$ f | 720MIPS, 2.8GFLOPS
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CPU core- M; v( u) f3 [3 X% ]$ F" k# J
| SH-4A core
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On-chip RAM
- e* G9 x$ h" u( A& K% o3 o | ILRAM: 16 Kbytes
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Cache memory, W, s! Z2 c1 B& p+ s, i6 q w
| 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data M. k3 C& G, _, }; X. G5 P5 C
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External memory
& v! y' C# Y1 @+ z3 j | DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus
& W4 p+ P" ]8 s/ @ T | DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus% b; G5 J4 z8 }9 Q' v6 k# i
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SRAM or ROM directly connected to extension bus
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Extension bus
3 R( y) t! `: }1 x: R! h$ r# ] | Address space: 64 Mbytes × 3
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Main on-chip peripheral functions% U( [2 |& K* Y
| Renesas Graphics processor(2D/3D)
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Display control: outputs for two screens (digital RGB and LVDS)
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Video input interface
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SD card host interface × 2 channels
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USB 2.0 host/function interface9 d0 |0 [2 a2 F9 x
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FM multiplex decoder2 K7 H/ U3 Y: X8 x) }/ b! m
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Controller area network (RCAN) interface × 2 channels6 w( d$ p% r4 }5 e
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MOST interface module* A+ I' u; @2 M6 F$ @
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Various audio interfaces × 4 channels
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Dedicated DMAC × 26 channels
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I2C bus interface × 2 channels; q/ e) X2 f2 c" d. B1 a4 c3 X
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Serial communication interface (SCIF) × 8 channels
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Remote control interface × 1 channel5 A( ?+ d' o0 k5 C
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A/D converter (10-bit) × 4 channels
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Timer × 9 channels
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On-chip debugging function- C1 D$ }5 F$ B
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Interrupt controller (INTC)
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Clock pulse generator (CPG): built-in PLL frequency multiplier
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Power-down modes6 \8 m5 g( h8 C2 z* \
| Sleep mode1 G Q4 p) u5 G2 h2 [% J6 {5 I
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Module standby mode- v& @' v5 [1 ~
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DDR-SDRAM power supply backup mode
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Package
" I: j3 w5 j' ^' C/ k; Q | 449-pin BGA (21 mm × 21 mm)
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