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| SH77722 (SH-NaviJ2) Specifications
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Type name" l- B/ r% n0 L' l4 ]
| R8A77722DA01BGV- \& e6 H# e/ a) a/ e+ }
| R8A77722DA02BGV. {3 H# o, ~* V) t ^( o2 ^6 a
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Power supply voltage! }6 J }- S* O5 u
| 1.15 to 1.3 V (internal), 0 O' ~& U% t2 k# p, k& V* \
3.3 V and 1.8 V (external), t: ]$ E5 {' R5 q
| 1.2 to 1.35 V (internal), # I: E: s) t. N3 `
3.3 V and 1.8 V (external)
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Maximum operating frequency
! o1 U# M5 v$ c# ~; M& \$ C, P | 336 MHz' U7 }6 w' i. j$ G
| 400 MHz
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Processing performance; G5 O# v: ~6 |7 z" t7 a2 H
| 600MIPS, 2.3GFLOPS
# Z; S! p7 v( |) z) r | 720MIPS, 2.8GFLOPS" L4 q" @2 P3 w8 e
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CPU core
% g0 c4 @0 c/ p* e4 E& G | SH-4A core8 V3 ?* E; y& a- a2 f- a* p1 j' r
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On-chip RAM
& {( N+ T4 {0 O# |: J | ILRAM: 16 Kbytes
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Cache memory. s) E4 p! y+ I& @% @5 l
| 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data
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External memory
4 c8 I& y @4 K5 `5 V( N | DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus
0 L& G$ B& v, V5 E | DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus
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SRAM or ROM directly connected to extension bus
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Extension bus
# _1 }. {8 {; _: x' b | Address space: 64 Mbytes × 32 R/ [6 q* Q; q# O; Y3 M3 C, K
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Main on-chip peripheral functions8 w" c( Y# n+ \0 r! P4 n/ H& F
| Renesas Graphics processor(2D/3D), O: ]" E7 `! c0 b/ \* z2 P+ n
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Display control: outputs for two screens (digital RGB and LVDS)3 l' T2 i6 v3 j$ u# v1 s
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Video input interface( [; E. n4 j' P; e- H, M. A) h
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SD card host interface × 2 channels
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USB 2.0 host/function interface
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FM multiplex decoder
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Controller area network (RCAN) interface × 2 channels1 e4 U# o* V v* U7 `* J
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MOST interface module% o: c# I# p }( }) [
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Various audio interfaces × 4 channels/ L2 o/ S3 n* U5 m8 w
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Dedicated DMAC × 26 channels7 P* ~* g* x/ d" n' y
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I2C bus interface × 2 channels
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Serial communication interface (SCIF) × 8 channels
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Remote control interface × 1 channel
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A/D converter (10-bit) × 4 channels
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Timer × 9 channels j- J; t9 @* i1 G. I6 A) X
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On-chip debugging function
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Interrupt controller (INTC)$ e, e1 E. b/ u+ {) U) t
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Clock pulse generator (CPG): built-in PLL frequency multiplier
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Power-down modes
% k; x# j/ ]" ^; t | Sleep mode
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Module standby mode
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DDR-SDRAM power supply backup mode
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Package
. K9 B4 n6 B% {8 f' I# C* [& j | 449-pin BGA (21 mm × 21 mm), j% n. L5 B/ X; \* Y1 T% d6 j
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