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| SH77722 (SH-NaviJ2) Specifications8 J( Z; `( V3 G& V/ M, Z
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Type name
' m9 ?; U8 f7 r | R8A77722DA01BGV
4 E2 d) o' D& X1 N# c7 | | R8A77722DA02BGV
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Power supply voltage6 `- U* j) G& Y8 O2 ]
| 1.15 to 1.3 V (internal),
" G* b/ b/ O9 B, i) q" D3.3 V and 1.8 V (external)
. z! b: s5 L2 M3 A | 1.2 to 1.35 V (internal), ( q& p1 ~% R( K( F
3.3 V and 1.8 V (external)% U( W' p8 i% W* a% c% F9 z1 \/ z
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Maximum operating frequency
" [. d8 D* ~9 F' J$ c0 u" D | 336 MHz
3 b9 a2 h6 `/ D) ^- Q+ U! `, E$ p | 400 MHz+ ~! `/ Y9 {. q0 m% c% z
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Processing performance+ z% L a9 `4 G1 _+ _- n
| 600MIPS, 2.3GFLOPS
2 [$ p6 W4 ^8 v5 W' a9 Q | 720MIPS, 2.8GFLOPS
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CPU core! V0 W) f9 w8 C% M6 |$ C+ }$ B
| SH-4A core% L( b" v: ^: N6 W, U ^
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On-chip RAM( j4 m6 r6 u% @- \3 x, c/ j
| ILRAM: 16 Kbytes
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Cache memory7 ^) _% V7 l2 u
| 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data
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External memory
: v4 t4 D p# x1 C. e+ u | DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus1 W5 x2 u7 J: J N* @# V
| DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus
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SRAM or ROM directly connected to extension bus, @! }; u8 K% K8 C
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Extension bus: {$ _% z; \6 D0 p1 z8 R- |: b J2 {
| Address space: 64 Mbytes × 3
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Main on-chip peripheral functions
) h# |6 c- } P2 _8 n$ \. _4 f+ u | Renesas Graphics processor(2D/3D)( j* V' X4 z& B) `, y4 E
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Display control: outputs for two screens (digital RGB and LVDS)* [7 B7 }; S( |4 Q' G( I
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Video input interface! n; S7 N, T* e5 [
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SD card host interface × 2 channels' y: V/ U% h& _. B9 `: o( p
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USB 2.0 host/function interface
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FM multiplex decoder
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Controller area network (RCAN) interface × 2 channels
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MOST interface module
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Various audio interfaces × 4 channels8 |& i/ e' d1 ]& I
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Dedicated DMAC × 26 channels
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I2C bus interface × 2 channels
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Serial communication interface (SCIF) × 8 channels$ L$ w" S& H9 Z# i! U( P9 J
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Remote control interface × 1 channel
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A/D converter (10-bit) × 4 channels
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Timer × 9 channels
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On-chip debugging function2 F/ u- T: ~$ _" X
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Interrupt controller (INTC)
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Clock pulse generator (CPG): built-in PLL frequency multiplier0 D6 Z7 ?. G1 G$ K: H y
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Power-down modes
J; b7 ?+ w0 p2 D( L" } | Sleep mode( g$ y3 V( A8 T* d: Q
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Module standby mode( t4 y, k2 h5 [
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DDR-SDRAM power supply backup mode4 S O! z, `% w+ d/ ]
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Package- d) t- r/ T e/ R: H! ]
| 449-pin BGA (21 mm × 21 mm)
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