The wholechip floorplan is very important before you start the layout.7 C0 J- T" Z0 c
Then the position of output pin are fixed for each sub block,and the line drawing will be smooth.( d+ c% I9 o7 R* v1 e) y$ o
Finally,the drc & lvs could be so easy to do ." c; d5 G: f* V1 ~
But the floorplan must be verified by designer.The thing of re-layout almost have not be happened.