CMOS多晶電容工藝誤差分析及設計研究 chn.pdf[簡]

sjhor

Design and Analysis of Technology Errors
for CMOS Poly-silicon Capacitor
& k1 X, g- E6 eZHUZhang-ming ,YANGYin-tang , ZHANGChun-peng , FUXiao-dong
9 s' [5 t6 I0 y(Microelectronics Institute ,XidianUniversity,Xi’an 710071 , China)
: G' z% a) t+ x: Z, a! N; b$ x$ n7 BAbstract : The technology errors of CMOS poly-silicon capacitor are analyzed .The effect of various errors introduced
during fabrication on CMOS poly-silicon capacitor is discussed .Based on the improved design of unit-capacitors , the
: S/ W8 j  r4 Z7 E' i- Z5 M8 `+ qcommon-centroid floorplan of poly-silicon capacitor is presented . On the proposed capacitor design way , the CMOS
% n" i" p/ L4 z" u* x8 gswitch-capacitor bandpass filters is implemented using 0.6μmCMOSDPDMprocess .Themeasured results of filters show
, u- l0 S* y5 q% vthat the proposed capacitor designway can be used to design high accuracy capacitors ,and applied to the design of submicro
and deep sub-micro analog integrated circuit .
6 F: D8 a  C( Z) U6 B, }2 y; X
8 A# n. {  j0 ]) m  V回覆後  可以下載PDF附件  權限10 & 3RDB

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, c" V9 t& L6 W5 r[ 本帖最後由 sjhor 於 2007-5-17 10:37 PM 編輯 ]

liangshangquan

CMOS多晶電容工藝誤差分析及設計研究下来看看学习一下，应该还不错哦

skygardon

好的，看看是否有用，這里的資料有的真的很特別啊，非常感謝哦！

tanbo

正好在找電容相關的內容  看看是否能學到更多的知識

guweiru

这个东西好啊，还是第一次看见呢，下下来看看，感谢楼主

kevin

Thank you for sharing the materials

semico_ljj

论文里有layout图吗？最好不是一堆图表、数据！。。。。。

fmgay

down下来看看，谢谢楼主。
如果文章写的好我继续顶你

xp212125o

感謝分享
先下載來看看
$ l. f7 _) M3 L3 lthank you very much~

k200630901

感謝大大的分享
目前正在學習
真是太感謝了!

fredyentw

good~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

fredyentw

GooooooooooooooooooooooooooooooooooooooooooooooooooooD

王可慶@FB

儘管上網查詢吸收這麼多 know how 0 H4 u  f( R/ ]但沒有實際上戰場終究還是紙上談兵 8 v+ |/ `: G! S7 d, y& T但還是謝謝版主無私分享

何建頫@FB

第一次看到這東西
/ P$ ^, R% _1 k9 q下载來看看
Thkans

k9966809

感謝分享 感謝感謝感謝