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Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks1 B$ U) b: j+ I+ N
然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack 6 E8 N7 K8 h7 ~' x
之後卻有如下之 Meaasge:
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******** Pin Access Analysis *******
% q4 S+ A! q6 C o0 h3 x** # Cell Masters = 1000/ T, c/ t8 j5 T. p; J% f; P
** # Ports (logical) = 2500: s" z" l+ l! H9 I: D6 d- m1 O
** # Pins (physical) = 25007 a) e2 Q4 `2 w, Q/ O& q
** # Pins with no good access point on Grid (V&H) = 5 ( 0%)
: e8 {, {, G/ Z! W+ x" A** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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' f0 b: U7 Y' w3 s+ k3 F: j% g請問下面這兩句是代表什麼意思呢?$ s% X6 H2 [) ~: T! W: T* g
** # Pins with no good access point on Grid (V&H) = 5 ( 0%)& X* P4 @4 }6 U0 y* f8 [/ }
** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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若是代表有錯誤的話是否要 Fix 呢? |
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