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Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
; x5 N; v) m, X% E然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack
6 T) n8 X9 L" N之後卻有如下之 Meaasge:! k! U+ \" G' p5 f- A) B
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******** Pin Access Analysis ******* ' Y% K1 f. _/ ^( d* ]
** # Cell Masters = 1000; ^+ y j# g) N. X% Q W
** # Ports (logical) = 2500
' I) c. B, I; k8 [9 l" y: B** # Pins (physical) = 2500
% C* V) @% J T' F** # Pins with no good access point on Grid (V&H) = 5 ( 0%)' C" G- X" z2 d
** # Pins with no good access point on Ver-Grid = 5 ( 0%)0 Z8 v: L1 y7 q7 O, d ^4 j
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請問下面這兩句是代表什麼意思呢?
" u0 W3 \, m* r3 t** # Pins with no good access point on Grid (V&H) = 5 ( 0%)
/ Q& z2 D) L% V$ U% t8 V5 ^** # Pins with no good access point on Ver-Grid = 5 ( 0%)
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$ O" ]2 G1 [* o3 u若是代表有錯誤的話是否要 Fix 呢? |
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