STD Cell Data Prepare 中 wire track 的問題?

hgby2209

Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack  
之後卻有如下之 Meaasge:
- R9 v( M9 J% Y
- m, a6 E" k9 A" D2 P( U! V4 ^3 E******** Pin Access Analysis *******
5 F2 g9 H) D; @8 K7 O** # Cell Masters    =  1000
% n# e! z0 ?9 r- G0 a** # Ports (logical) = 2500
% u8 x# @) ?8 n! V; x0 n$ s* r0 }** # Pins (physical) = 2500
' q3 U; c$ X# m9 @, g** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
** # Pins with no good access point on Ver-Grid =    5 ( 0%)

1 }  B) t* w6 i1 h% M% J請問下面這兩句是代表什麼意思呢?
+ N) I- D  C7 ^% i1 j** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
4 T7 `9 O+ I9 j) X4 L** # Pins with no good access point on Ver-Grid =    5 ( 0%)
2 s% e" _1 ]; L& e
若是代表有錯誤的話是否要 Fix 呢?