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AMD Geode LX 800@0.9W處理器 II
Display Controller
5 X4 H/ p! O8 j% w: h■ Hardware frame buffer compression improves Unified
) S o9 @' l1 `( `5 bMemory Architecture (UMA) memory efficiency
1 y& G- A4 O- U) A) a2 C* O■ CRT resolutions supported:
, k s' Z/ b$ @: _— Supports up to 1920x1440x32 bpp at 85 Hz
7 _6 X3 M, V8 z— Supports up to 1600x1200x32 bpp at 100 Hz
9 i/ F- x; a% V3 ^$ \■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT7 W6 R+ H! g2 S8 F
■ Standard Definition (SD) resolution for Video Output' ]+ }1 b1 p/ x. f E: g9 l
Port (VOP):9 l& p( D l# P+ B: @' R+ N
— 720x482 at 59.94 Hz interlaced for NTSC, M0 B/ A9 g+ _# D# [6 j4 \7 t# k
— 768x576 at 50 Hz interlaced for PAL7 y! v3 I0 w" j3 k: k
■ High Definition (HD) resolution for Video Output Port# Q7 W, P+ v; |
(VOP):4 T' m. K. a/ z, z% U4 u; \/ H
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
& `+ D, \ N6 c; U0 B3 J9 H(74.25 MHz): B$ N" m+ g+ D' s$ _
— Up to 1280x720 at 60 Hz progressive (720p HD)
1 G, G, j4 T3 B(74.25 MHz)
8 x6 e; |/ M6 j' E( C( L■ Supports down to 7.652 MHz Dot Clock (320x240+ T8 @/ h9 i F& ]5 ~/ M
QVGA)! d6 O2 l1 K% p9 v# p6 ]( \4 V7 }
■ Hardware VGA n/ f: _7 x( L5 C% {& `& @6 } M
■ Hardware supported 48x64 32-bit cursor with alpha& X G2 W4 y7 U$ i& V( I3 N" H
blending/ T9 [/ b3 r# k; c
Video Processor- S/ [6 ]& o% c3 e( U+ u' G. l# H
■ Supports video scaling, mixing and VOP3 ^$ m$ ?" \, R1 l4 t; F
■ Hardware video up/down scalar
' j2 }7 F# i& R/ _■ Graphics/video alpha blending and color key muxing" Q4 [* L& i" V) J& E+ b
■ Digital VOP (SD and HD) or TFT outputs7 J* Y2 Q, U7 n" m
■ Legacy RGB mode
9 z4 w' P! j/ h q: f■ VOP supports SD and HD 480p, 480i, 720p, and 1080i
0 P7 p/ H( R9 p■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
1 B* N5 z) g+ z% h! wcompliant6 X) g Y3 A. J! I+ [" k
Integrated Analog CRT DAC, System Clock PLLs and
: S! _+ \. J6 ~7 k' O: LDot Clock PLL- O2 G) V. [* o4 \; v O
■ Integrated Dot Clock PLL with up to 350 MHz clock
: @/ F( F$ u/ m5 f( X■ Integrated 3x8-bit DAC with up to 350 MHz sampling
) S4 O5 F. Z" G, O6 O. B■ Integrated x86 core PLL6 X+ r5 v3 ?7 j# Z9 I4 r
■ Memory PLL/ O! S6 `' J; R- W; n
GeodeLink™ PCI Bridge: i1 v. _& b0 N8 V! F7 ^! j9 R5 F
■ PCI 2.2 compliant
" \, _& m" r% J) ]" A4 S: v0 }7 q■ 3.3V signaling and 3.3V I/Os
7 L3 s/ b; A3 p& i( ~- A■ 33 to 66 MHz operation& `& n, T- f7 M w
■ 32-bit interface* C+ o, E* c& ]' K4 D" m$ g
■ Supports virtual PCI headers for GeodeLink devices9 ^; k. C" _: d$ ]5 G- G" [
Video Input Port (VIP)
( f- a/ @; g+ C" b0 w( L■ VESA 1.1 and 2.0 compliant, 8 or 16-bit
) q0 l" o1 V0 }$ n t■ Video Blanking Interval (VBI) support
( g$ O* m; W( S3 J3 d■ 8 or 16-bit 80 MHz SD or HD capable
) ~2 L( j3 v1 ? ^. _Security Block
! `! ^9 m0 H$ x$ ^■ Serial EEPROM interface for 2K bit unique ID and AES
; Z# L& J! Q" }8 n(Advanced Encryption Standard) hidden key storage: j: m! Y9 m# @& Q* U
(EEPROM optional inside package) L$ w' g+ d% R) y" ?& l
■ Electronic Code Book (ECB) or Cipher Block Chaining
, b" J7 r! ^! H(CBC)128-bit AES hardware support
) y3 Y. h, p& F% L# ^! d■ True random number generator (TRNG) |
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