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AMD Geode LX 800@0.9W處理器 II
Display Controller& F3 d& y+ q$ y1 V- a
■ Hardware frame buffer compression improves Unified
' }2 P" ~) D0 f- U* V: NMemory Architecture (UMA) memory efficiency
& ?8 x, A, J0 O; {# v T; b■ CRT resolutions supported:7 `# J K3 ^' F" T9 N8 p
— Supports up to 1920x1440x32 bpp at 85 Hz
5 D( v( ], R- V% @) U6 M— Supports up to 1600x1200x32 bpp at 100 Hz* \' y% L. Q. |# m2 _
■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT4 ]$ T4 |* ~- Z4 d1 A
■ Standard Definition (SD) resolution for Video Output; V. J; x) ]* j
Port (VOP):
* y$ S4 l: g T! P2 e— 720x482 at 59.94 Hz interlaced for NTSC
p3 W0 b+ [# Q% F— 768x576 at 50 Hz interlaced for PAL
, P( {6 C; J4 d% o6 j■ High Definition (HD) resolution for Video Output Port
0 v B0 h) t+ o5 a" ~& z(VOP):
; i9 |3 o. l1 M2 t: u/ x0 h— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
k1 L# u! Y1 [# [(74.25 MHz): e C% d K& M; e" X9 n% w4 y( c
— Up to 1280x720 at 60 Hz progressive (720p HD); b) ~5 V; B1 E% l& z
(74.25 MHz), f, k1 e0 O) c( x6 |! ^- l
■ Supports down to 7.652 MHz Dot Clock (320x2401 O" P! g7 T# S8 G
QVGA)* s: q. e; i1 @" r8 Z9 `" r
■ Hardware VGA
) g4 N9 R8 h6 A+ ]' }■ Hardware supported 48x64 32-bit cursor with alpha1 G0 d$ Z$ L6 C" n" q1 p
blending
* X' a( r$ i6 oVideo Processor* ^3 _& m1 i$ x% Y* U. _* y9 _
■ Supports video scaling, mixing and VOP
; O, v) h$ m( E3 o1 X7 m■ Hardware video up/down scalar
% Y4 s, X2 C+ x8 q* ?■ Graphics/video alpha blending and color key muxing
' ?6 `& p5 Y! i■ Digital VOP (SD and HD) or TFT outputs+ E; A4 p2 f8 l% c W! Q3 l
■ Legacy RGB mode; D1 N1 {: M4 k5 Z+ T
■ VOP supports SD and HD 480p, 480i, 720p, and 1080i
9 d0 @) h8 [) h. l* B; T■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
8 e* `* g2 a6 }% g6 z& Ecompliant
4 f { m. q" M0 l& r; ~Integrated Analog CRT DAC, System Clock PLLs and. A& [3 b+ s) _6 D# ?
Dot Clock PLL: }" c4 D! a- d: l$ \7 ~9 z E/ }
■ Integrated Dot Clock PLL with up to 350 MHz clock
( V7 P$ g- a: s2 M5 Q4 g/ _9 u■ Integrated 3x8-bit DAC with up to 350 MHz sampling
* r/ O4 U. k2 B; L0 l$ w■ Integrated x86 core PLL
6 [) u2 e6 T& |- E, w$ D& X0 E■ Memory PLL
# Q2 v" N; `7 jGeodeLink™ PCI Bridge
+ L& U3 G* H$ t! @# Z/ l* x" @ G1 E■ PCI 2.2 compliant5 p0 X/ b+ [/ W# ~' M
■ 3.3V signaling and 3.3V I/Os* d4 C$ t3 L$ K3 I) a
■ 33 to 66 MHz operation
+ s1 ?: A! g4 [- m■ 32-bit interface
$ Z* G7 F- a- }% [% A; x; R" H■ Supports virtual PCI headers for GeodeLink devices, d9 w3 E; L( Z! X- j
Video Input Port (VIP)1 L. a7 e' v8 J# i d% E) f) F
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit+ W6 V; k; t& x' h
■ Video Blanking Interval (VBI) support
$ h, a# H0 r" {' n■ 8 or 16-bit 80 MHz SD or HD capable+ `& ?5 s0 U/ I" M9 O5 e4 B
Security Block: F) }2 `9 Y. K) h: U
■ Serial EEPROM interface for 2K bit unique ID and AES3 }9 f8 q5 A2 K& H/ \/ ?; v# Z
(Advanced Encryption Standard) hidden key storage; C0 a5 I2 @8 r& @
(EEPROM optional inside package)4 ~, n, K6 ~2 j& h
■ Electronic Code Book (ECB) or Cipher Block Chaining8 g0 _& V/ a! L3 q8 \
(CBC)128-bit AES hardware support
3 L6 w9 L9 G$ ^+ V7 y, @■ True random number generator (TRNG) |
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