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AMD Geode LX 800@0.9W處理器 II
Display Controller8 q# d; X+ Y) T |( \& u* f3 }* e
■ Hardware frame buffer compression improves Unified; ^* |2 w1 R0 k" M
Memory Architecture (UMA) memory efficiency3 M) j3 P/ G% R( p2 Y: ?/ C. D
■ CRT resolutions supported:8 \& n$ b6 u/ S) A2 v7 m2 |) f ]1 P
— Supports up to 1920x1440x32 bpp at 85 Hz d7 X: N3 q( t" |1 H2 N9 H& I
— Supports up to 1600x1200x32 bpp at 100 Hz
9 y( r1 w* \- N r6 ]■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT" N- n+ R: }9 E, o& }1 N
■ Standard Definition (SD) resolution for Video Output" V/ a+ m6 g5 c; ^. s
Port (VOP):. B F& R& k5 j' e. C, m/ t* k
— 720x482 at 59.94 Hz interlaced for NTSC
8 g, e9 m+ O7 D# D5 Q— 768x576 at 50 Hz interlaced for PAL3 H6 g3 z4 L7 N8 S. Z
■ High Definition (HD) resolution for Video Output Port5 p# o6 t3 n* d: x& _
(VOP):2 g2 \6 V3 z9 J7 ?( N. }0 k" E
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)# t5 T" |+ L) A- S4 E
(74.25 MHz)
4 R$ y1 @$ G) f7 X" L9 ~— Up to 1280x720 at 60 Hz progressive (720p HD)
7 P7 `8 _- A8 z9 ^' B v(74.25 MHz)
/ C+ R x7 M" W■ Supports down to 7.652 MHz Dot Clock (320x2403 `, n8 O6 P3 O; U
QVGA)) D H* G) q6 v" K3 B5 E# E
■ Hardware VGA
[# g% H, g& i: L0 K■ Hardware supported 48x64 32-bit cursor with alpha
% w/ \' J6 y9 _# Mblending7 P2 \" C/ S4 G. ~
Video Processor
5 p6 K3 L. L2 Z, l■ Supports video scaling, mixing and VOP
; f$ T6 K9 _/ x+ v■ Hardware video up/down scalar3 E- M/ f! {2 c% E! p
■ Graphics/video alpha blending and color key muxing$ G1 r* Y3 {/ x. m# g
■ Digital VOP (SD and HD) or TFT outputs
7 X8 I9 v6 p. ]( m( h■ Legacy RGB mode
' B# Y1 N, y' Q9 T■ VOP supports SD and HD 480p, 480i, 720p, and 1080i# \1 T' H4 s: d' ?4 t, O8 m
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656- o# B( p' p; u
compliant
, B4 C: \3 G$ |2 Y/ E( zIntegrated Analog CRT DAC, System Clock PLLs and+ d7 _8 v, ^3 J R; Z
Dot Clock PLL
# W" D8 q! }: Y- u- l' X3 v■ Integrated Dot Clock PLL with up to 350 MHz clock- x( ?; ^6 D) S) r! c
■ Integrated 3x8-bit DAC with up to 350 MHz sampling% V0 z z* k2 z- i) J
■ Integrated x86 core PLL+ N$ C. b2 S5 a
■ Memory PLL
/ n0 w# d. o8 X. yGeodeLink™ PCI Bridge
1 ]: e+ E) L, w! L3 D■ PCI 2.2 compliant( x, c; s" Z( j0 a- R
■ 3.3V signaling and 3.3V I/Os2 Q& R( X; W2 F0 B+ z% c Y
■ 33 to 66 MHz operation# D# H" F. j8 I8 m0 Y \, m
■ 32-bit interface- U% G% z4 w: z* P Q
■ Supports virtual PCI headers for GeodeLink devices/ v: \2 t: ^1 G* Z& h( `4 r4 p
Video Input Port (VIP)4 e* h2 s, U+ K
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit+ a- B/ v* l1 p) Z
■ Video Blanking Interval (VBI) support* X- M" x# p/ T F6 j# W& q7 `9 W' \
■ 8 or 16-bit 80 MHz SD or HD capable) Y7 K9 t% G6 ]& f. u4 p1 F U( t
Security Block
2 P1 \" q* t( G' |( I T■ Serial EEPROM interface for 2K bit unique ID and AES* f5 U8 U" d0 y9 T. W
(Advanced Encryption Standard) hidden key storage
6 z! r- F9 M: K$ c0 r% H4 O(EEPROM optional inside package)
; j5 F4 a6 m$ H4 c- ~3 ^■ Electronic Code Book (ECB) or Cipher Block Chaining; w* j) T1 {; N+ ?6 j# A! i4 F
(CBC)128-bit AES hardware support& D( R5 P6 a1 M5 L5 P) q
■ True random number generator (TRNG) |
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