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請問一下VCCINT & VCCIO還有其對應的GND 這些腳位是做甚麼用的啊??
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' Q) i2 N7 i+ C! u- I2 v我已經看我DATASHEET上對這方面的說明,但感覺還是有點不清楚
" c6 C& t. B& f U- {感覺上VCCINT & VCCIO好像只需要各接一隻腳就可以了,其他相同名稱的腳位都是相通的.....
1 A: x. J Z! y我的想法正確嗎??' [& Z( p j0 w% j2 E, L# a3 n5 ^
( |" R) I# _7 F0 D: M' h* Q如果布正確的話....
( o3 U, M; u) h3 v能麻煩各位幫我做個詳細的解說嗎??
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先說聲謝謝~1 p; w3 [' U7 n5 j
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: n$ P3 V- \ b3 n8 {----------以下是DATASHEET針對VCCIO & VCCINT所做的說明------------
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MultiVolt I/O Interface
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MAX 7000 devices—except 44-pin devices—support the MultiVolt I/O
9 K3 h: I0 F' I/ U; [interface feature, which allows MAX 7000 devices to interface with. L1 e% J4 c3 J5 _
systems that have differing supply voltages. The 5.0-V devices in all
3 C* U$ P# \8 Tpackages can be set for 3.3-V or 5.0-V I/O pin operation. These devices
4 u- a9 \* j% J) [% z7 {have one set of VCC pins for internal operation and input buffers
# ~0 d8 x4 _$ v i; p! W(VCCINT), and another set for I/O output drivers (VCCIO)./ d$ F+ V% h# S- U) W
The VCCINT pins must always be connected to a 5.0-V power supply.& O( u5 V: F% l; ]& p" ?5 p$ M
With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and
0 q6 b' ?7 @% F7 ^( {are therefore compatible with both 3.3-V and 5.0-V inputs.1 K9 s! h6 j' B% U: V
The VCCIO pins can be connected to either a 3.3-V or a 5.0-V power
$ S' Z7 k2 _! r6 U8 ^! msupply, depending on the output requirements. When the VCCIO pins are* N5 B+ |( T6 A ^$ m) Z) k
connected to a 5.0-V supply, the output levels are compatible with 5.0-V
+ [! B# z3 c6 @systems. When VCCIO is connected to a 3.3-V supply, the output high is) a) n1 H0 y( B( {8 h9 e9 h
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
1 y' N5 R% b: y; zoperating with VCCIO levels lower than 4.75 V incur a nominally greater/ |3 k A+ _7 ^% O6 ]+ |1 f+ w9 i
timing delay of tOD2 instead of tOD1.8 l g# ~* H g% ]! Y4 p- e
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[ 本帖最後由 jimcooper 於 2008-11-9 04:21 PM 編輯 ] |
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