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借鉴一下RF ESD Design in 130nm CMOS

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發表於 2008-11-1 23:05:57 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
An ESD-Protected 5-GHz Differential Low-Noise Amplifier in a 130-nm CMOS Process! T. H: y6 _  Z# v" S9 x" c

. C/ l7 _7 A3 t+ aAbstract- A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully2 M* W& g/ ~6 S8 e, J  z, B
applied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design,
# m9 v% r" v- n2 uan ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially
& @3 ^& Q# q9 x8 junder the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA
8 G0 P( t4 ~) ~6 Twith the proposed ESD protection design has the human-bodymodel (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness.2 p$ h% {% Q- ?3 p8 E

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2#
發表於 2009-10-16 10:18:46 | 只看該作者
This is what I need document....
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' m/ \+ z7 Q" B: O8 a2 o0 `/ P. R1 @- l0 ]2 _& D; Z, _+ G+ I% n
Thanks.
3#
發表於 2010-2-5 14:10:00 | 只看該作者
i hope u can bring me some admirations.
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