借鉴一下RF ESD Design in 130nm CMOS

semico_ljj

An ESD-Protected 5-GHz Differential Low-Noise Amplifier in a 130-nm CMOS Process

7 Q4 Z3 m, T* z6 \  @4 rAbstract- A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully
5 b) t1 n4 |3 e+ Qapplied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design,
an ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially
% B* x, a7 [' x$ r2 V8 ]under the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA
with the proposed ESD protection design has the human-bodymodel (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness.

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Chandler_Tseng

This is what I need document....
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Thanks.

ksj116

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