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借鉴一下RF ESD Design in 130nm CMOS

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發表於 2008-11-1 23:05:57 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
An ESD-Protected 5-GHz Differential Low-Noise Amplifier in a 130-nm CMOS Process( s- H. ]: A; n9 n
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Abstract- A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully$ R' D$ R8 F) D; [! ^
applied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design,7 Z; Z# M8 ~3 G7 R
an ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially3 X5 H# E0 {3 y, k% \; a1 \! V
under the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA9 {4 D" L- O4 O/ P, \/ L' Y0 Y
with the proposed ESD protection design has the human-bodymodel (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness." d1 ~7 o1 B  g/ C5 \: U
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發表於 2009-10-16 10:18:46 | 只看該作者
This is what I need document....7 X9 k1 O4 x( @' L! P4 U9 S! J

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Thanks.
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發表於 2010-2-5 14:10:00 | 只看該作者
i hope u can bring me some admirations.
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