Cadence SoC Encounter 8.1 Update Seminar

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Cadence SoC Encounter 8.1 Update Seminar

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* Y5 D- s- T6 C  s2 k: E想了解Encounter最新8.1  版本強大的新功能嗎? 想知道Encounter 8.1如何協助眾多設計成功案例嗎?  我們將展現Encounter如何讓您的晶片設計smaller, cooler & faster，也提供您處理大尺寸晶片設計的解決方案，趕快參加Cadence益華電腦免費的Encounter 8.1 Update 研討會吧。
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Nov. 14, 星期五: 09:00am – 13:30pm
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9 J0 c  _2 M9 u- P6 j. N+ E地點：
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新竹國賓大飯店13F 會議室A&B (新竹市中華路二段188號)
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8 o( v! Z. n7 x. H: y7 e名額有限，請即刻報名！(http://www.cadence.com/tw/events ... ion.aspx?eventid=16)
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& H( ~4 s; D$ t4 O% W09:00~09:30 / Registration
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* m3 X. O9 d; `% L9 p2 l09:30~09:40 / Automatic floorplan for design exploration to get the best result
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09:40~09:50 / Balanced clock tree to reduce process variation effects                                                                                 
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0 C0 U6 S% W0 V09:50~10:00 / 32nm support for the very advanced technology

10:00~10:10 / Post route optimization and SI closure productivity

2 p* R+ l( S5 o2 l8 M! [10:10~10:20 / 100% MMMC support in the entire implementation flow
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* D* L# x$ b, f10:20~10:30 / Dynamic power optimization and low power CTS for power reduction

      

7 F4 n! \9 u3 A0 ~0 R       10:30~10:50 / Break
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10:50~11:00 / Encounter Power System for new generation power integrity analysis

/ F. d. K6 p. R; f$ P$ H0 V0 z11:00~11:10 / 3 very advanced statistic applications for better performance

11:10~11:20 / Active Logic Reduction Technology (ART) to handle big chips
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: C: E6 y# _( I; M- E+ {11:20~11:30 / Constant run time and memory usage improvements
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11:30~11:40 / End-to-end parallel computing support
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11:40~11:50 / Encounter Foundation Flow for ease of use and productivity gain
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* G2 T& Q7 U3 S: |' f9 c, R11:50~12:00 / Ending
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12:00~13:30 / Lunch