10/31 Verification Now Taiwan台北驗證技術研討會

jiming

隨著晶片設計的日益複雜化，驗證工程師的規劃過程也需不斷改進。有鑑於此，國際知名的Verilab驗證技術顧問公司將於10月31日在台北君悅大飯店舉辦Verification Now Taiwan 2008研討會，會中特別邀請國際知名專家及廠商分享最新的驗證技術應用與趨勢，並與業界菁英共同探討如何善用layered stimulus generation技術，提高SystemVerilog驗證平台設計的靈活性(flexibility)與重用性(reusability)，以加速驗證平台的設計流程，有效提昇設計生產力。http://www.verification-now.com/

Verification Planning of Complex SoCs and Advanced Techniques
for SystemVerilog Testbench Design
Today's complex designs require a well thought out verification strategy. Proper verification planning and the use of advanced techniques in a SystemVerilog environment can help guarantee that your design and testbench verification process will go smoothly.

This technical seminar will provide attendees with information on why verification planning is needed and how to apply it to your methodology effectively. We'll also look at the importance of layered stimulus generation techniques for building flexibility and reusability into your SystemVerilog testbench and how to successfully implement them.

Follow JL Gray on the seminar tour

Click on the presentation titles below for a more detailed abstract.
Requirements Based Verification

Building Flexible and Reusable Testbenches using a Layered
   Approach to Stimulus Generation