Overview on ESD protection design for mixed-voltage I/O interfaces

semico_ljj

Overview on ESD protection design for mixed-voltage I/O interfaces
with high-voltage-tolerant power-rail ESD clamp circuits
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9 I+ l: b1 K$ d( g" xIntroductory Invited Paper
5 d5 _# z, O$ ZMing-Dou Ker
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ulysseslaii

goodgoodgoodgoodgoodgoodgoodgood

heyunpro

goodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgood

cedric761193

The ESD is easy implement but difficult to design.