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Sr. Layout Engineer /Staff Layout Engineer5 G, |. s- b' ?; [" L+ v8 J
- i1 {4 M5 q" P3 f公 司:one famous IC company9 V" r3 ^9 W" T$ F
工作地点:上海& w) W, r( r9 s5 ]
- {1 S: H' i M( B+ f4 B/ eJob Requirements: 9 Y8 {/ b# m, r/ p* R( u/ Z
-Work with circuit designers to build physical design floor-plan;
, t: p. v) O: z' Y, N-Complete the physical layout design with the constraints of circuit design requirements;
# v! d$ M1 b, v5 i) O7 e-Verify the physical layout design to meet both circuit design requirements and process requirements; 0 ^/ p$ R, C/ |/ f% _
-Use the advanced technologies to improve layout design quality and efficiency.
- i A* h# y+ W3 t; M# W, R7 l8 X$ {
7 ~1 X7 ^& [6 W: k) P0 n$ {" WQualifications: 1 p7 K3 @; W3 Q6 u8 O
-College degree (or above) in Electrical Engineering or other related engineering field;
8 ?0 ^! s0 p+ y$ w% F- q M6 y, F-At least 4 years experience in layout design field with rich tapeout experience;
- X8 @$ N [# [( V. y. q-Good understanding of basic electronic principles dealing with circuit and layout design; : j+ T- _9 `5 H. ?! K
-Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification; 4 `5 c# A' x5 [( b
-Prefer experienced in PLL and IO design 1 [8 q. |8 ^$ x
-Patient, A good team player, Good communication skills;
$ K) O& h+ W1 I. u& A: Y4 B0 ]-Can communicate with both written and spoken English. |
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