Xilinx Virtex5 FPGA 結構與特性

小朱仔 · 發表於 2008-3-26 00:28:20

*Objectives
: V7 U  z& }, H" ]* Y& x2 [After completing this course, the student will be able to:- I4 W( B2 |7 D3 X/ l+ F, D0 U7 \( W$ _
Describe both the feature enhancements of the V5 over the V4," M! _  U, [; P/ D7 Y6 O
and4 j* ]2 Y- L( \. ~! }
New architectural features of the V5
7 ]3 Z7 s. t7 D& GHave a fundamental understanding of how these features can be5 J' E, `- ?& ?) q7 Q: @# {# Z
leveraged to bring about timing closure.& v3 K. y$ [1 ?- o. T  r& z- V4 y& d7 I6 e3 a
*Agenda
7 p( ~5 A' P4 v9 tOverview (15 minutes)
8 l. M7 [4 X& |! \& e( jBrief Description of Differences between V4 and V5 (30 minutes7 o8 {* W8 Z0 n/ G
V5's new PLL and Use with DCMs (45 minutes). Z5 h; G! O8 w6 D$ f3 D) K
Lab 1 – Introduction to the PLL/Architecture Wizard (30
$ N" U" k* {/ P7 b3 Aminutes)3 [* o5 F" L, Z, C( I/ v: h
Improved Features in V5 (30 minutes)! G% r+ J: f0 d; D2 F( _7 X& d
Lab 2 – Leveraging Improved Features (45 minutes)

hqioan · 發表於 2008-7-2 13:04:38

下載來看看...希望有幫助....最近在學

moneyhqq · 發表於 2009-1-4 19:31:14

hao hao hao hao hao hao hao hao

ch1122 · 發表於 2009-1-9 13:51:49

下載來看吧...多增加一點知識也是不錯...
感謝分享..希望以後有機會能用上

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Xilinx Virtex5 FPGA 結構與特性

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