|
回復 4# 的帖子
1. Using technology file to create a library9 V& T: A1 A5 z- j4 S* g- o3 P0 w, R
2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.; v7 {: y% @+ C+ [: D
3. Open new created library, and create some metal blockage if need.* Z2 @: s3 y# Z
4. Do smash if need.
5 o b+ m# w9 I( |. n n5. remove some unnecessary extension txst. IE VDD ---> VDD
) i$ w: E# \# |4 r6. Define power,ground as well as in/out port. I$ D8 o0 S" T3 K) z8 Z
7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.
7 R7 R/ U! U$ e# G
5 M% M) v* g( V4 n. {, o6 hThe processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.$ d" z# s8 G- e, W
-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?$ q; g- S4 m% p/ J
I don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
|