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大家好,我是新加坡Uni Connect公司的獵頭,我叫周倩倩。我公司在新加坡為各大半導體、電子行業的客戶做技術人才招募已有15年經驗。請參考我們的網站:www。uniconnect。com。sg。(請自行將句號換為點)
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- {0 e; }1 X* w+ c& F, y現在有一個中國大陸的半導體通信、娛樂解決方案提供商在招募一個資深職位,permanent position,工作地點是新加坡,待遇從優:
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Senior Analog/Mixed-Signal IC Design Engineer1 z& @' T1 n+ t% t. y
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Responsibilities:
2 d( E h+ E1 r/ b* ?) ?9 b7 @•The Senior Mixed-Signal IC Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power and low noise circuits.
# a, ?" i2 Y& {" Y•The responsibility of the Senior Mixed-Signal IC Design Engineer includes scheduling, design, simulation and layout of mixed-signal circuit blocks, including pre- and post-silicon verification.
3 m1 Y$ W" z6 ^. @•It is also expected that you will conduct periodic design reviews, including with application engineers.
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Requirements:
) T$ g: p9 I0 ^$ s! B; y8 o/ G/ U•Master/Bachelor’s Degree in Electronics/Electrical Engineering.
2 t. W1 G" j/ k; f8 }5 W•Minimum 3 to 5 years experience in Analog or Mixed-signal IC design.
( \0 ^' h* {* j. I•Very good knowledge of CMOS processes. 2 \+ R V8 B0 J; V+ x9 i. n
•Highly proficient in analog and mixed-signal IC design tools.
; @4 g6 ?: g8 t8 ]! |•Experienced in analog and mixed-signal circuit designs, such as regulators, DC-DC converters, low-power, low-noise biasing circuits and amplifiers, sigma-delta modulation and ADCs etc
: m1 s" y9 Y+ _( `( ~+ P2 P•Skilled in laboratory testing of IC prototypes. . ~2 d5 P0 ` ~0 `7 W6 ]0 r; B
•Knowledge of Linux operating system required.
: w# n/ _8 @7 ~9 d. T•Experience in MEMS interface ASIC design advantageous. i# S' O# g8 S P' G
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請聯繫我電郵:qianqian@uniconnect.com.sg,Skype ID:zhou.qianqian.uc,或者直接撥打電話+65-63251262無時差。! i4 N% K' T4 @/ q
1 p4 ]6 Y) W' z. p# ~期待各位朋友來信! |
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