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Senior Physical Design Engineer
! \: G6 X4 t+ U- [8 y公 司:A famous IC company4 b$ u0 ~9 [% D$ P( i. B: N
工作地点:南京) U: {3 G1 y' g: h5 m- O9 r
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Key Responsibilities ' ], s( O1 l2 ^3 @8 i
Depending on experience, key responsibilities will involve some of the following: 8 k5 `( R! Q/ T# S3 R% K
IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification. ! j) r5 y" }. i6 o& q0 ^4 b8 k1 Y- n/ N
As a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
. @0 m* ~" `% f/ Q- MLeading a team of physical design engineers and resolving the technical related issues. ; b4 d. q. c: ]8 |; p
Crosstalk analysis, power analysis, and static timing analysis. - B# \; Q5 U7 J$ j9 T f+ S
Write scripts in Tcl to improve productivity. $ z, r7 v: e! Z9 L, ]" K
6 W( d0 b! u, A" T4 L/ qExperience: 5+ years in physical implementation engineering
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( M4 X' e. q4 ~# L! n5 Y* d0 bEssential skills
; g1 f* n% b+ zMS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills 8 H% u9 ~* r7 Y0 F% b& M I: I
Experience with Magma or Synopsys place-and-route tool set and physical design project implementation. " t) [/ {) `0 ~" I6 [2 l
Good programming skill. Capable of writing Tcl or Perl. * D5 ]6 u" v" Z% A, k F
Familiar with synthesis, static timing analysis. ' d/ w& N. s6 r" C1 z) G2 ~0 {
Self-motivated team worker, good verbal and written communication skills in English.
7 b& P. i* W2 ^1 ?6 w8 v' w; STechnical and team leadership proffered. Previous management experience highly desired. ) _2 Y6 q. \8 B/ e6 x6 J
Experience with synthesis, DFT, and verification is preferred. |
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