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樓主 |
發表於 2013-12-12 09:14:21
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只看該作者
Senior Physical Design Engineer
3 B- Y# ~/ r+ ]# W- I0 E/ _" ]公 司:A famous IC company
9 c/ l( \' a- @) M6 I* _工作地点:南京
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5 T! D# B. ?' k$ ]; lKey Responsibilities 6 t- A3 T' n4 [: i
Depending on experience, key responsibilities will involve some of the following: / `& [2 I0 }5 M4 \+ j
IC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
$ n" l( Y U& gAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
% b3 @2 D! p* ~* \Leading a team of physical design engineers and resolving the technical related issues.
! V& `& C7 J; [. E/ P+ Y9 X; dCrosstalk analysis, power analysis, and static timing analysis.
+ Q/ r4 e3 V" |+ E0 sWrite scripts in Tcl to improve productivity.
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: C5 g% ]- Q8 h4 a8 x职位要求& q. I) H) i! ?; q
Experience: 5+ years in physical implementation engineering
1 v; ^0 W5 M6 }9 H. M$ P) {Essential skills & x# u0 G6 y$ h
MS in EE required.&#8226roven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
# P% t0 O& o" t8 g: J2 SExperience with Magma or Synopsys place-and-route tool set and physical design project implementation.
2 V$ g' s( K6 ^7 hGood programming skill. Capable of writing Tcl or Perl. & \+ x" [/ J9 ?7 i
Familiar with synthesis, static timing analysis.
8 }6 s! m) Z$ U0 [# u9 OSelf-motivated team worker, good verbal and written communication skills in English. 5 f3 Z# R% g2 Y4 g% E& w
Technical and team leadership proffered. Previous management experience highly desired. # A( g* B; `/ c5 u0 J9 t1 _
Experience with synthesis, DFT, and verification is preferred. |
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