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實驗平台~( F( o) [, u% ?% |, o+ X
「Terasic」Altera DE0 多媒體開發平台,Cyclone III 3C16 FPGA
5 T1 u3 `& d8 E# G' G N+ a在建構的過程中(僅放入cpu跟memory ip)) h+ n! e: c4 O) c4 A
no reset vector has been specified for this CPU8 \; Y! e/ E \/ n- \$ C
no exception vector has been specified for this CPU
* x6 l+ W- F( _8 X9 ]這兩個訊息,沒辦法完全消除,這兩個一定要消除嗎% Q, X7 A& R. S6 n
試過
* y: J% v D; O: non chip memory
& r- r2 q, P9 lsdram+ h- x( q# g1 ^# b( k
用上面兩個去試過所有可能的組合(mem/mem,sd/sd,sd/mem,mem/sd)
% }# e x R- V5 g6 Y8 ? Xno reset vector has been specified for this CPU: w, u1 d8 ^, t6 I S4 O W* W7 x
no exception vector has been specified for this CPU
+ @" \; ~) f a/ I( n o總是會有一個沒辦法去除(先選的訊息會被消除); F! X+ a' z. J) o' H# w$ @
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有人有在玩10.1版嗎?請多多幫忙~~
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$ N: ` `3 j* m+ X* }目前打算~改用10.0sp1跟9.1sp2試試看: m$ h# Q3 u: a3 ]" N e
E+ ?8 C, ^$ z5 D/ ?
THX~ |
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