Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

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semico_ljj

Abstract -- The diode operated in forward-biased condition has
1 o& w! E0 S9 s) ]; Sbeen widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
; _' P; W. t! W: Lloading effect and high ESD robustness in CMOS integrated
circuits (ICs). This work presents new ESD protection diodes
5 O1 V, J% _* C) V* H  Lrealized in the octagon, waffle-hollow, and octagon-hollow layout
styles to improve the efficiency of ESD current distribution and
- B6 S* P3 j7 B. ]/ J3 r+ Ito reduce the parasitic capacitance. The new ESD protection
diodes can achieve smaller parasitic capacitance under the same
$ e4 \5 M) G1 _0 ?& g# z& q$ n8 GESD robustness level as compared to the waffle diode. Therefore,
the signal degradation of GHz RF and high-speed transmission
& h: X* n- c& ?/ a' J* X0 ~$ ?can be reduced due to smaller parasitic capacitance from the new
proposed diodes.

xp212125o

看起來有幫助
感謝分享
8 ]. n& f- c. K1 n先下載來看看
thank you ~

linyuejing

下載來看看
) u# L% `6 _5 P下載來看看
' Q5 u: Z3 M+ E; n8 q% `下載來看看
下載來看看
應該有幫助
. \# ]$ `+ `9 {% j謝謝囉

caesarxl

谢谢楼主分享，非常感谢

oika_51

看起來有幫助
' G/ j9 J  H% x9 m感謝分享

linger809

Abstract -- The diode operated in forward-biased condition has
  A! I/ w  r9 |; zbeen widely used as an effective on-c ...
) }# R: J# M0 ], E' ^semico_ljj 發表於 2010-6-25 08:50 AM

' ]& S! b  P* k# m7 f+ O% c) Z& n
/ O/ ^5 s" c/ X/ P不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oscargo

正為ESD耐受度傷腦筋----

zhifj86

thank you very much for your sharing

sslin

謝謝大大的分享~~知識因分享而壯大！

~只有站在巨人的肩膀上才不會被食人族吃了!