Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits
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sslin

謝謝大大的分享~~知識因分享而壯大！

~只有站在巨人的肩膀上才不會被食人族吃了!

zhifj86

thank you very much for your sharing

oscargo

正為ESD耐受度傷腦筋----

linger809

Abstract -- The diode operated in forward-biased condition has
4 o6 h* E/ |8 M. c  k# ^4 I" s7 ]been widely used as an effective on-c ...
semico_ljj 發表於 2010-6-25 08:50 AM

" [0 y0 i! N2 a不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oika_51

看起來有幫助
7 w1 K1 }% r& c- p" d0 K感謝分享

caesarxl

谢谢楼主分享，非常感谢

linyuejing

下載來看看
2 h; y% t9 C' \下載來看看
下載來看看
7 s4 n8 w) N& X( |$ Z下載來看看
3 E4 N0 K1 j" }" M/ f應該有幫助
2 y, ]) e1 T4 N2 |+ Y) _, T8 y4 g謝謝囉

xp212125o

看起來有幫助
感謝分享
先下載來看看
$ ~/ M3 ?. V7 S6 y' |/ H4 c% }" z5 Pthank you ~

semico_ljj

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
, h. f1 S4 _! A" N/ tloading effect and high ESD robustness in CMOS integrated
: @, b1 \% I' [& [: @6 A/ ycircuits (ICs). This work presents new ESD protection diodes
+ y) K2 j4 y) f& Y1 hrealized in the octagon, waffle-hollow, and octagon-hollow layout
4 l! F- L+ r  c0 }* R0 K4 B; jstyles to improve the efficiency of ESD current distribution and
* ^+ P( w  [& ]to reduce the parasitic capacitance. The new ESD protection
diodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
, a) H: F. m$ athe signal degradation of GHz RF and high-speed transmission
$ x& {6 Y( `1 j  J7 `; Vcan be reduced due to smaller parasitic capacitance from the new
9 e: A6 o$ }0 g9 Gproposed diodes.