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[問題求助] 使用暫態分析模擬出phasenoise @ MMSIM701

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1#
發表於 2009-8-27 02:01:53 | 顯示全部樓層 回帖獎勵 |倒序瀏覽 |閱讀模式
原文連結
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, _. G  \# @7 H, Q0 |以下原文內容:( @, o* O: q7 w4 Y, X
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Calculating Large Signal Phase Noise Using Transient Noise Analysis8 R1 V8 u. b/ [2 H
By Alan Whittaker on March 26, 2009
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: n9 c; t0 t* B; f$ z  j4 K- H: `, DMy name is Alan Whittaker and I'm in Cadence's Custom IC Proliferation Group.  
, J3 O$ R; L, C+ fWe support Cadence's Technical Field Organization (the AEs) and Cadence customers
" a  K1 `" }" x0 H1 L0 rduring the introduction and adoption of new and advanced EDA technologies.  I'll
2 E# W/ w: v4 D( d& Zbe posting here from time to time on methodologies and tool features that $ v' ~# j( G& B9 {
resolve issues that users have run into during the front-end analog, RF and
" g1 f/ g/ Q$ {% o# m  b- U" |mixed-signal design process.6 x: f- g, U: e3 X5 R/ I) N2 Q5 X
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I'm first going to address how you can perform a large-signal phase noise
8 s) d( t4 W4 ^analysis on a design block such as a VCO using our transient noise analysis
/ b0 W3 v1 ]1 z; E  g, d/ Icapability in our Spectre circuit simulator.  This approach is in addition to % D+ ~3 ^, `' [; M+ S2 H
our small signal phase noise analysis which is available using either pnoise / }( ]) g/ u9 [* W6 r
or hbnoise analysis in the SpectreRF option to Spectre.1 l" f/ j6 n9 Q5 S8 G7 F

4 E1 W% Y% H' ?9 Q; NHere are the steps to obtain a phase noise plot from transient noise analysis:  `6 e: C, u+ s% W3 e

  q2 S* `7 y+ I$ U& R% X1.  Set up your oscillator testbench circuit for a transient noise analysis ! z4 ^. H$ P0 K' q5 w
(See sourcelink for the Transient Noise appNote - it doesn't discuss the phase 3 o0 l8 i8 V- W  C: m; \
noise measurement, but describes how to properly set up the simulation analysis
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2.  Add the block freq_meter from the pllMMLib library
- {( w3 D, O+ g% @($CDSHOME/tools//dfII/samples/artist/pllMMLib)
6 W8 c$ G3 ~4 k  tto the testbench circuit. Important: The instance name for this block must be
# J6 l3 ~/ |  X'vco_freq'.
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If the oscillator output is differential, connect it to the vin_p and vin_n . w' \% [/ f7 Q: D
pins on the freq_meter block. If the oscillator output is single ended, connect
4 o$ j1 P' h, @6 g& Uit to the vin_p pin and connect the vin_n pin to ground. Connect a noConn cell 3 u- a5 d- @' @% m7 }$ Q- [2 w1 `0 K
from the basic library to the out_freq pin.
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2#
 樓主| 發表於 2009-8-27 02:07:34 | 顯示全部樓層
The parameters for this block are (set Tools Filter to veriloga in the CDF
) s  H- q. m2 h: E' @parameter form:
4 V1 J7 z; e1 H    *: ~# f, G" A) r6 a  a
      Vthup: Threshold voltage to determine the rise edge of the input waveform.
% ^9 n: y  _: y- Q1 _+ y( |The input waveform period is determined by two adjacent rise edges. Default is 0. $ d* Y$ ^( c! _  y, Q; ]- G- y
    *
3 ~9 y. g/ i% F+ g1 E5 I      ttol: The tolerance of the time where the rise edge is determined. Default
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    *
+ L1 b% F' H/ j3 Z% j- p      outStart: The time-dependent period of the input waveform is output to the ' D/ ?3 m# w5 x8 O" r" r9 J
file when the time is greater than outStart. Default is 0. To get accurate phase
& \" k8 L* U. Onoise measurements, set this to past the time when the oscillator is fully & x& ^4 [3 ]7 E& G% |# r0 m/ {
powered up and oscillating at the design frequency.8 Y. i( F5 u+ t9 `# _: u, h
    *
$ g7 ?. Z' P5 q: N5 G2 z+ A2 b      outfile: The name of a file to contain time-dependent periods for use in ; j' [4 S. U( @: H! v, I
later psd calculations. Specify just the file name, not a path. If outfile is
' N& h5 ?3 N8 g. W  ?, p7 f: {left blank, the default name is periods.txt.
3#
 樓主| 發表於 2009-8-27 02:11:04 | 顯示全部樓層
3.  Before starting the simulation, in the ADE window, Select Tools->RF->LL. In the PLL Macro Model Wizard window, enable PLL Macro Model and select PLL Bench as the Bench Type. Then OK this form.. g+ ^5 q+ O" v$ H* I
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4.  Run the simulation. The simulation must run successfully to completion in order to get to the phase noise results.( p$ d, _1 Q0 A/ W, i; F5 [

- m# i4 j5 C: M; O  S3 h& |7 Y5.  In the Direct Plot form for transient noise there should be a PLL PSD Noise option. This will allow you to plot the phase noise results. If a message appears saying that the PLL Noise PSD data is not available, check steps 3) and 4). If you make any corrections, you will need to re-run the simulation.# F+ {; M* L1 q% u
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The phase noise plot will extend from fmin = 4/tstop to fmax = fosc/2, where tstop is the transient noise simulation stop time and fosc is the oscillation frequency of the circuit.
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2 F2 D( V* ]" m. i% i( _# [2 v9 HImportant note: You will need to use MMSIM701 and IC5141USR5 or IC613 (or latersubversions) to obtain a phase noise plot from transient noise analysis.
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! a: n0 N/ U/ u1 J4 y% _我用的是mmsim620,也不能模。有人可以模擬出來的回個文,show個圖給大家看吧
4#
 樓主| 發表於 2009-9-25 16:46:23 | 顯示全部樓層
謝謝你的回覆,我最近拿到新的軟體也開始在測試mmsim7了
* D1 k, {2 {4 l" ]5 F, L& ^/ b我發現turbo與multi thread的設定不同會對結果造成很大的不同。; a+ d- T0 x7 O4 n
還有這個phase noise的訊號的範圍跟transient noise的設定與transient 的設定都有很緊密的關係。6 Z. O; h# A/ I& F' `9 J
不知道該怎麼作設定才是比較準確的
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