LVS問題 望大大指點

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使用LEdit90的LVS時，顯示This file is Binary.LVS can not perform iteration.無法進行對比，這是怎麼回事呀

m851055

是比對檔案中路徑的問題，若有需要詳細說明把netlist PO上來................

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原理圖
* SPICE netlist written by S-Edit Win32 7.03
* Written on May 27, 2009 at 16:57:24
# c4 T1 \- ^! o' i* Waveform probing commands
.probe
.options probefilename="G:\tanner\Nand2_1.dat"
+ probesdbfile="G:\與非門2.sdb"
6 A# C4 _  [1 `7 o7 I+ p+ probetopmodule="Nand2"
; h) X0 U, [: }1 W* Main circuit: Nand2
M1 OUT A N4 Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
( C' m- @- S8 V' [( xM2 Gnd B N4 Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
M3 OUT A Vdd Vdd PMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
9 h/ @. \0 m; W0 YM4 OUT B Vdd Vdd PMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
* End of main circuit: Nand2

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版圖
! O4 \7 v" v/ s* Circuit Extracted by Tanner Research's L-Edit Version 9.00 / Extract Version 9.00 ;
' X- `2 j  {; v+ I; k. H5 t* TDB File:  G:\tanner\Nand2.tdb
- ^  R0 q/ g& o* Cell:  Nand2        Version 1.07
3 j# }" b% J/ {* D6 R8 r& H* Extract Definition File:  G:\lights.ext
$ k7 Y. t6 C7 Q' x( F- T* Extract Date and Time:  05/25/2009 - 15:05
6 M9 @" N5 P( R9 b; d- p# T* Warning:  Layers with Unassigned AREA Capacitance.
*   <N Well Resistor ID>
( `7 @: s, t, E*   <Poly Resistor ID>
*   <Poly2 Resistor ID>
*   <N Diff Resistor ID>
4 e& t- v) |; r8 M$ n*   <P Diff Resistor ID>
6 P. y; |3 \: u: H, ~*   <P Base Resistor ID>
* Warning:  Layers with Unassigned FRINGE Capacitance.
*   <N Well Resistor ID>
*   <Poly Resistor ID>
* H2 N3 y! A- e2 k' b*   <Poly2 Resistor ID>
9 _) c: n3 }( L3 @! N* _. V4 Y: y( B4 C*   <N Diff Resistor ID>
*   <P Diff Resistor ID>
*   <P Base Resistor ID>
*   <Pad Comment>
*   <Poly1-Poly2 Capacitor ID>
  }% P2 L, L3 T3 A* Warning:  Layers with Zero Resistance.
; P* V; r; l, k/ q) Y  i* N*   <NMOS Capacitor ID>
9 k% ~( q$ z( P$ x*   <PMOS Capacitor ID>
*   <Pad Comment>
. d6 C2 h4 g/ k0 u, n*   <Poly1-Poly2 Capacitor ID>

* NODE NAME ALIASES
*       1 = B (12,-14)
*       2 = A (-16,-18)
*       3 = OUT (-2,-21)
+ |" a) {0 S2 x' \' y*       4 = GND (-30,-35)
. [3 M4 u( }7 k7 n2 z: i' b*       5 = Vdd (-32,14)
M1 Vdd B OUT Vdd PMOS L=2u W=6u
* M1 DRAIN GATE SOURCE BULK (3 -3 5 3)
# @* ?2 @% i4 j+ _, l4 {( r: YM2 OUT A Vdd Vdd PMOS L=2u W=6u
$ e1 ]( `+ j- }) {& G3 v) h* M2 DRAIN GATE SOURCE BULK (-5 -3 -3 3)
# B1 k3 g5 ~; j6 h) c  g. m7 aM3 OUT B 6 GND NMOS L=2u W=6u
* M3 DRAIN GATE SOURCE BULK (3 -31 5 -25)
M4 6 A GND GND NMOS L=2u W=6u
* }$ ?4 O/ N$ I. A# k; D* M4 DRAIN GATE SOURCE BULK (-5 -31 -3 -25)
4 g1 Y& |* w# V& m* Total Nodes: 6
% f: O2 C) Z; A; c. }6 K* Total Elements: 4
* Total Number of Shorted Elements not written to the SPICE file: 0
9 v/ W" j5 v% y/ h' z* Extract Elapsed Time: 0 seconds
.END

m851055

與非門2 files name改為英文名稱.......................

xjyy

我宅了一周 沒想到栽在路徑上  萬分感謝 ！！！！！！！！！！