IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture

michaldl

Sponsor
% [1 z1 ]$ k: b4 U9 e+ OTest Technology Standards Committee of the IEEE Computer Society
3 I) `. h2 E9 j  g" FApproved 14 June 2001
4 }( J/ f; e. p& N$ d( J9 m$ ]IEEE-SA Standards Board
Abstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
support of assembled printed circuit boards is defined. The circuitry includes a standard interface
through which instructions and test data are communicated. A set of test features is defined,
3 a, |: t$ B8 c3 jincluding a boundary-scan register, such that the component is able to respond to a minimum set
3 I" h# Q9 {; J5 v7 K5 [0 oof instructions designed to assist with testing of assembled printed circuit boards. Also, a language
is defined that allows rigorous description of the component-specific aspects of such testability features.
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5 h1 X5 j! F( P( O# Q8 p1 Q" `Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
1 ~0 m2 U$ V) QTAP, test, test access port, VHDL, VHSIC Hardware Description Language
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