|
Analog / Mixed Signal Examples/ L' D; e0 P# O
, R0 @0 W+ ~3 e) T
Behavioral Models of ADCs7 j9 [" \" P2 R* G
\ams\sampling\; sampling_101;0 f) T% m0 I! v( x4 _
Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2;
; H6 I' ^0 C+ ]) e. V Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3;
" [& [1 P) G* H Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4; 7 \6 O- _8 H9 j" ~5 ~ p9 D9 y
$ M r! i; R3 [( d( l: O7 X
Behavioral RF
# M+ \& F& t0 U5 j. i- _3 F# h Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;/ r" ?% a* s$ S$ z7 E0 z
# a- H- E" U- q( e& kPLLs
$ h2 u4 O8 X% M3 P3 \ VCO with phase noise $ cd
! r" `4 s8 G6 x( Y+ }' I Pll with freq domain instruments $ cd \ams\pll;
+ W- N# F1 f5 J5 U6 v" c# K4 t Pll fractional with analog compensation $ cd \ams\pll;
@; Q, \/ Q8 _5 a Pll fractional with digital compensation $ cd \ams\pll;
) c v5 B u$ [3 C* ^ y/ g Pll optimization (Nonlinear Control Design) $ cd \ams\pll;
6 s/ P+ E' o# y# W* q9 K Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing; " y5 X0 g% t" ]3 v$ }# \; ^+ D
Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
|