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[問題求助] 使用暫態分析模擬出phasenoise @ MMSIM701

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1#
發表於 2009-8-27 02:01:53 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
原文連結
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7 P0 F7 w+ A% \! G2 ]6 T, R以下原文內容:1 V5 T9 p1 O7 X1 U  j
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Calculating Large Signal Phase Noise Using Transient Noise Analysis+ o" ]$ U9 I& _6 _. k, m+ Y
By Alan Whittaker on March 26, 2009* D0 |$ K! M4 Z% ~- ^

- y. y3 h3 `; j- P# |( qMy name is Alan Whittaker and I'm in Cadence's Custom IC Proliferation Group.  2 e" z1 [6 i+ n/ a
We support Cadence's Technical Field Organization (the AEs) and Cadence customers
4 h, ]0 K. s9 v6 G' A, Mduring the introduction and adoption of new and advanced EDA technologies.  I'll 3 z! K- H: d' P: f" o
be posting here from time to time on methodologies and tool features that
( f+ q+ B& P  m, d, E6 P7 E! }resolve issues that users have run into during the front-end analog, RF and
$ |" {7 j& M. E% I/ cmixed-signal design process.
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I'm first going to address how you can perform a large-signal phase noise 2 e; _3 x) d5 @) O
analysis on a design block such as a VCO using our transient noise analysis $ V) B3 k  \. g- o. O% N
capability in our Spectre circuit simulator.  This approach is in addition to
7 v& r" p& W& j/ h4 S, Vour small signal phase noise analysis which is available using either pnoise
; L+ z& `. d% mor hbnoise analysis in the SpectreRF option to Spectre.
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Here are the steps to obtain a phase noise plot from transient noise analysis:
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6 h; I$ C* y$ \& I, N1.  Set up your oscillator testbench circuit for a transient noise analysis ( X& s2 p; y1 O: Y
(See sourcelink for the Transient Noise appNote - it doesn't discuss the phase
; K  e8 S' h4 L+ N: e: Snoise measurement, but describes how to properly set up the simulation analysis9 t% f9 K% o. G1 i. u; t- m

; M' P5 u, Y: h+ u2.  Add the block freq_meter from the pllMMLib library & q+ r" W8 G$ }- j- t& B
($CDSHOME/tools//dfII/samples/artist/pllMMLib) 5 ^2 Z4 M0 m- ~# Q7 W7 {- Z
to the testbench circuit. Important: The instance name for this block must be
- v) U! Y( s7 C) {8 k  y. J3 I'vco_freq'.
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If the oscillator output is differential, connect it to the vin_p and vin_n , W5 y4 Z& a# H" N# Z& [% Z
pins on the freq_meter block. If the oscillator output is single ended, connect & n. e4 k6 w% ]1 C
it to the vin_p pin and connect the vin_n pin to ground. Connect a noConn cell
" w% F( u1 Q. s% x$ V1 @from the basic library to the out_freq pin.
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2#
 樓主| 發表於 2009-8-27 02:07:34 | 只看該作者
The parameters for this block are (set Tools Filter to veriloga in the CDF
. M9 W/ h: Y: J- H# `; m- A3 l7 G& eparameter form:
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6 [; i" v. z6 h6 G. l5 s2 V" m      Vthup: Threshold voltage to determine the rise edge of the input waveform. 2 K! ^# C/ q- F
The input waveform period is determined by two adjacent rise edges. Default is 0.
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3 n. N8 N; ]0 K9 L1 e, V      ttol: The tolerance of the time where the rise edge is determined. Default ( O" H0 o( N4 V1 d, W; {2 e
is 1p.9 i) O$ S6 U) f
    *
$ i- l6 T$ N1 l0 R1 y; D# q8 p' L+ l      outStart: The time-dependent period of the input waveform is output to the & I' A6 a; H) i" p8 V+ `
file when the time is greater than outStart. Default is 0. To get accurate phase
3 f* i( F8 `1 F- T3 {) E$ \noise measurements, set this to past the time when the oscillator is fully : a" G& }; s" z
powered up and oscillating at the design frequency.
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      outfile: The name of a file to contain time-dependent periods for use in
8 r  }1 V. @9 m$ h$ clater psd calculations. Specify just the file name, not a path. If outfile is
5 N! |5 ^4 N: S+ a2 ]; J$ Dleft blank, the default name is periods.txt.
3#
 樓主| 發表於 2009-8-27 02:11:04 | 只看該作者
3.  Before starting the simulation, in the ADE window, Select Tools->RF->LL. In the PLL Macro Model Wizard window, enable PLL Macro Model and select PLL Bench as the Bench Type. Then OK this form.6 ?, ]- _9 w, b

2 ]+ r  M9 e8 {% m4.  Run the simulation. The simulation must run successfully to completion in order to get to the phase noise results.
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5.  In the Direct Plot form for transient noise there should be a PLL PSD Noise option. This will allow you to plot the phase noise results. If a message appears saying that the PLL Noise PSD data is not available, check steps 3) and 4). If you make any corrections, you will need to re-run the simulation.
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The phase noise plot will extend from fmin = 4/tstop to fmax = fosc/2, where tstop is the transient noise simulation stop time and fosc is the oscillation frequency of the circuit.1 o3 l. I$ ]0 C5 j8 J% E% F

8 X: O6 i, L6 K* rImportant note: You will need to use MMSIM701 and IC5141USR5 or IC613 (or latersubversions) to obtain a phase noise plot from transient noise analysis.. I2 H/ p/ W- b( X7 C, x

4 r" Y8 p5 @9 P% Q' b4 k我用的是mmsim620,也不能模。有人可以模擬出來的回個文,show個圖給大家看吧
4#
發表於 2009-9-24 17:41:38 | 只看該作者
show you my simulation result
0 T, _) }( y! {) d1 V+ L  Q!!!& b0 ^2 Q; E; s* d9 q
!!!!!!!!!!!5 i3 W: r6 K$ Y9 [9 m
!!!!!!

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5#
 樓主| 發表於 2009-9-25 16:46:23 | 只看該作者
謝謝你的回覆,我最近拿到新的軟體也開始在測試mmsim7了1 M2 Y- X7 k$ i9 X
我發現turbo與multi thread的設定不同會對結果造成很大的不同。4 Q. r5 r$ n8 F( W+ m9 {% q
還有這個phase noise的訊號的範圍跟transient noise的設定與transient 的設定都有很緊密的關係。
; R6 Y4 J: T, ?1 ]$ Y( o/ w不知道該怎麼作設定才是比較準確的
6#
發表於 2011-5-6 00:39:50 | 只看該作者
請問有更詳盡的使用方法嗎
7#
發表於 2011-5-26 15:02:19 | 只看該作者
也去试试这个流程。关于pll相噪仿真还有其他方法吗?
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