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Analog / Mixed Signal Examples, g N" |! Z1 c% n
6 [' G* V9 A( j7 h! X/ YBehavioral Models of ADCs
; l6 p9 z0 G. C# V# R\ams\sampling\; sampling_101;/ v- I1 V3 R4 C5 L
Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2; ( r8 F6 |1 {) i y0 S
Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3; . t, ]& p' W$ T: c
Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4; : X0 n8 i, {& D/ p" X0 L* ^* c. a
" I; i* n. [5 V! PBehavioral RF0 N( y' V$ ~: r3 K. P
Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;
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! `3 w( x. @1 b sPLLs
. U8 a5 \( t/ d4 [- }1 \, Z/ } VCO with phase noise $ cd : e* }7 I% K. Z* b& T. }
Pll with freq domain instruments $ cd \ams\pll; / [, A8 [3 p D& j6 {9 [% Z& P
Pll fractional with analog compensation $ cd \ams\pll; 6 w/ D/ G6 W9 l
Pll fractional with digital compensation $ cd \ams\pll; & ^2 e6 W$ M) F8 Z9 P& ^7 H
Pll optimization (Nonlinear Control Design) $ cd \ams\pll;
. V$ A# M m. e! a& Q( j2 P% n Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing; - l0 W/ a' M0 O. s6 O( |; K0 @
Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
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