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AMD Geode LX 800@0.9W處理器 II
Display Controller
) E( e# m! e% ^7 y6 L Z- F■ Hardware frame buffer compression improves Unified
' b6 t, V- m5 _/ D, E, aMemory Architecture (UMA) memory efficiency
, m8 s" ^& B; W+ L' F$ H; M" c■ CRT resolutions supported:
3 u1 Z$ k1 a# ?3 H— Supports up to 1920x1440x32 bpp at 85 Hz
6 v5 _1 u/ x$ y5 @% [ R— Supports up to 1600x1200x32 bpp at 100 Hz0 q% Z9 ^: |, h' U
■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT
6 T5 }& E" n/ G' [0 o% m0 V: t■ Standard Definition (SD) resolution for Video Output
: h K7 P8 ~0 v! m6 }2 fPort (VOP): V5 B2 p$ q7 s. |3 H- e( G
— 720x482 at 59.94 Hz interlaced for NTSC
& d6 K3 g: q! A7 w8 e" T& u— 768x576 at 50 Hz interlaced for PAL
/ d4 w" l: r6 w7 h■ High Definition (HD) resolution for Video Output Port
/ |1 P, A8 y9 w, i(VOP):8 G8 E' ^, b! d' C& M1 l' g" |
— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
) G! Y. _/ }, c! v6 O(74.25 MHz)
. Q. T3 R7 V) Q4 C$ p— Up to 1280x720 at 60 Hz progressive (720p HD)/ W" a8 G9 Y* R9 x# ]" p
(74.25 MHz)/ T( k1 r- w- H T' j
■ Supports down to 7.652 MHz Dot Clock (320x240- }; {% U+ }$ ^& }( N `
QVGA)1 N9 Q$ v7 F* ^+ A+ k4 f
■ Hardware VGA8 Y. }! O- ^2 M
■ Hardware supported 48x64 32-bit cursor with alpha. K1 j: w7 a$ Z& e- l% @
blending
: T. S2 s2 B) h- MVideo Processor
0 Q$ R8 k- k5 k: N& X■ Supports video scaling, mixing and VOP$ {. v9 M& m/ }1 w& _3 Z V
■ Hardware video up/down scalar* b( o( z: A& K! |; m3 V4 \' _
■ Graphics/video alpha blending and color key muxing
" i6 k, p. {; k■ Digital VOP (SD and HD) or TFT outputs2 q. `4 p0 Y; L
■ Legacy RGB mode2 V% z7 J" l5 A
■ VOP supports SD and HD 480p, 480i, 720p, and 1080i ?/ `. l, z3 i
■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.656
; P+ i. `, n$ ?, @( i: [; j) Y2 ncompliant
2 a% W. o4 [9 j/ q* O# RIntegrated Analog CRT DAC, System Clock PLLs and4 A# A. }' ~3 N7 f& I c! [
Dot Clock PLL' [$ ~ x; `& ?, t3 H
■ Integrated Dot Clock PLL with up to 350 MHz clock
* V0 _: B6 Q% h- M9 H■ Integrated 3x8-bit DAC with up to 350 MHz sampling1 P& o! I3 e# x( E/ I
■ Integrated x86 core PLL# {, [& k5 n" y% j, x: b# _' ?2 y
■ Memory PLL
1 q3 |9 e j2 `GeodeLink™ PCI Bridge
; j, _- D- N l5 r3 i9 k■ PCI 2.2 compliant
, c. {. A3 S! @& Q; _: P■ 3.3V signaling and 3.3V I/Os6 D( A% k* ?9 ?
■ 33 to 66 MHz operation
# G$ f" k, Z; e) D" t■ 32-bit interface: _* ^- Y, B" L6 H- B
■ Supports virtual PCI headers for GeodeLink devices
1 F1 m* @- S2 x" X9 _# R) qVideo Input Port (VIP)4 J. Q% ^: m, B" X- X& }2 {
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit$ o$ ]; y" A4 o" S
■ Video Blanking Interval (VBI) support" p0 `5 Q7 D5 L( ]( `, N# |& Z( E; S
■ 8 or 16-bit 80 MHz SD or HD capable' U; A4 `" W) A; n4 T& Q0 J
Security Block
/ K6 }7 T4 Y; E$ K■ Serial EEPROM interface for 2K bit unique ID and AES& o, p* D% s0 c ~) O. Z; Y
(Advanced Encryption Standard) hidden key storage w( \5 N" a: \; Q7 K0 x' D. r
(EEPROM optional inside package)
% M6 |3 B q. K; T h+ F■ Electronic Code Book (ECB) or Cipher Block Chaining
' V' x% \/ Q" o5 a, ~(CBC)128-bit AES hardware support1 B( W4 H9 i$ U, P. s: C
■ True random number generator (TRNG) |
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