Design of High-Voltage-Tolerant ESD

semico_ljj

Design of High-Voltage-Tolerant ESD Protection
* |6 h  b# y- B: J) {; VCircuit in Low-Voltage CMOS Processes

: c/ \) O/ S9 U. P' K0 wIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009

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ritafung

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009

這個是2009年嘛... 那麼快便有下載?
% V' O8 I6 ?+ c3 |* g- ^: L& b謝謝分享!

CHIP321

High-low Voltage-Tolerant IO,这种接口中文是怎么翻译的？多篇论文里提及，能否有大大帮忙解释下？
万分感谢。