初學者一問......有關EPM7128S......VCCINT & VCCIO的問題

jimcooper

請問一下VCCINT & VCCIO還有其對應的GND 這些腳位是做甚麼用的啊??

/ i; Y9 M4 U9 d' y, k' q我已經看我DATASHEET上對這方面的說明,但感覺還是有點不清楚
  G. ?( ~. i5 ?+ g8 s5 |3 p感覺上VCCINT & VCCIO好像只需要各接一隻腳就可以了,其他相同名稱的腳位都是相通的.....
) I$ W, ~4 h1 O. s, m我的想法正確嗎??

如果布正確的話....
能麻煩各位幫我做個詳細的解說嗎??

- B( p0 Q' ~9 M& z  p* K' V8 _先說聲謝謝~

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0 p, u: J) L; P! k' c----------以下是DATASHEET針對VCCIO & VCCINT所做的說明------------

- u2 U& @. }+ c' KMultiVolt I/O Interface
2 R8 i0 Q' I. v2 }* H. O
MAX 7000 devices—except 44-pin devices—support the MultiVolt I/O
" b+ `- q1 e/ D' c" Minterface feature, which allows MAX 7000 devices to interface with
systems that have differing supply voltages. The 5.0-V devices in all
packages can be set for 3.3-V or 5.0-V I/O pin operation. These devices
have one set of VCC pins for internal operation and input buffers
* I  {( ~4 @! G' d+ @(VCCINT), and another set for I/O output drivers (VCCIO).
5 r' s- Y& Z: ?9 _# G% CThe VCCINT pins must always be connected to a 5.0-V power supply.
With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and
5 y6 M7 M/ D, u6 C; I3 Fare therefore compatible with both 3.3-V and 5.0-V inputs.
The VCCIO pins can be connected to either a 3.3-V or a 5.0-V power
supply, depending on the output requirements. When the VCCIO pins are
connected to a 5.0-V supply, the output levels are compatible with 5.0-V
systems. When VCCIO is connected to a 3.3-V supply, the output high is
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
operating with VCCIO levels lower than 4.75 V incur a nominally greater
timing delay of tOD2 instead of tOD1.
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[ 本帖最後由 jimcooper 於 2008-11-9 04:21 PM 編輯 ]

sieg70

Vccint跟Vccio, 以及Ground"每根"都要接

addn

您好
VCCINT接5v,則當io pin為輸入時,可接受3.3v,5v的輸入準位
VCCIO接5v/3.3v,則當io pin為輸出時,輸出準位就為5v/3.3v準為位
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7 P9 u" g' F4 K* ^  Z  X$ p[ 本帖最後由 addn 於 2008-11-10 10:16 AM 編輯 ]

ssejack1

VCCIO 在有些產品有分 block, 當不同 IO 電壓要使用在同一顆 IC 時可以劃分在不同的 block 就可同時使用不同之IO 準位; VCCINT 為 IC core 電壓,與 user 較沒直接關係,只要依 spec. 供給就沒有問題!
( I5 u, O3 ?' h$ H- J* }4 ]須注意的是 VCCINT 與 VCCIO 有點影響,越低的 VCCINT 製程越新, delay / speed 多比較快,壞處是 VCCIO 會較低;
比如 VCCINT = 3.3V者, VCCIO 一般 3.3/5.0 均可,但 VCCINT = 2.5者 VCCIO 或許無法始用 5.0 v 了!
1 ^  q7 S5 q% w: \7 M" B4 J3 u( d% R參考參考!