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大家好,我是新加坡Uni Connect公司的獵頭,我叫周倩倩。我公司在新加坡為各大半導體、電子行業的客戶做技術人才招募已有15年經驗。請參考我們的網站:www。uniconnect。com。sg。(請自行將句號換為點)
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現在有一個中國大陸的半導體通信、娛樂解決方案提供商在招募一個資深職位,permanent position,工作地點是新加坡,待遇從優:3 e. m B. i. k1 C Z' N% m
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Senior Analog/Mixed-Signal IC Design Engineer
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" I5 q% h7 O" e/ K, C# S- `Responsibilities:
$ N3 |" S( q F•The Senior Mixed-Signal IC Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power and low noise circuits. & K/ v2 i9 P5 F3 T3 W0 z# o' n
•The responsibility of the Senior Mixed-Signal IC Design Engineer includes scheduling, design, simulation and layout of mixed-signal circuit blocks, including pre- and post-silicon verification.
" O$ z0 F7 M- v8 o•It is also expected that you will conduct periodic design reviews, including with application engineers.
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Requirements:
. M3 ~0 V9 T+ w; f6 U9 S•Master/Bachelor’s Degree in Electronics/Electrical Engineering. . w! Q( u) q6 ]) c& i
•Minimum 3 to 5 years experience in Analog or Mixed-signal IC design.
5 S9 G, M0 x9 c7 a7 f0 r7 @3 z•Very good knowledge of CMOS processes. 5 Q C& e1 V: D3 L
•Highly proficient in analog and mixed-signal IC design tools.
1 J8 o2 X. ~ B% F) U•Experienced in analog and mixed-signal circuit designs, such as regulators, DC-DC converters, low-power, low-noise biasing circuits and amplifiers, sigma-delta modulation and ADCs etc
0 P+ d) v q; a- v6 E3 P•Skilled in laboratory testing of IC prototypes.
' I5 E& w- w. ?; \- h•Knowledge of Linux operating system required.
+ E3 N O3 d6 }+ U•Experience in MEMS interface ASIC design advantageous.
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1 E* {8 ~ Y: C/ [6 O; Z8 R; [請聯繫我電郵:qianqian@uniconnect.com.sg,Skype ID:zhou.qianqian.uc,或者直接撥打電話+65-63251262無時差。
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期待各位朋友來信! |
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