[關於] [jianping ]如何用verilog將變數前後補上幾個位元

tommywgt

/ m) ]6 f; o4 X因為無法回覆, 所以開新文回答....
3 |9 R, N% E9 f3 UABT={2'b00, DATA, 4'b0000};
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" N- U, i1 H( S# PVerilog 常用的operator
  t# J4 |0 m7 D4 w2 b– Binary bit-wise operators: ~, &, |, ^, ~^, ^~
– Unary reduction operators: &, ~&, |, ~|, ^, ~^, ^~
6 x) w8 \! l) U$ @; K9 N% h– Logical operators: !, &&, ||
– 2’s complement operators: +, -, *, /, %
– Relational operators: >, <, >=, <=, ==, !=, ===, !==
5 G1 Q" H: T$ {3 x! h# X, T; E– Logical shift operators: >>, <<
– Conditional operators: ? :
– Duplication operators: {n{ <exp> <,<exp>> *}}
– Concatenation operators: {}
給你參考一下