IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture

michaldl

Sponsor
. m' o: S# B9 V, v8 ~7 hTest Technology Standards Committee of the IEEE Computer Society
) i) K4 L( Q+ j; i+ d  y- _Approved 14 June 2001
0 U4 b; F9 X8 D: D/ F. B. s, d, HIEEE-SA Standards Board
' _9 l% n1 [) z. g) T- ?7 PAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
% s- j8 T% b3 m5 y2 ^9 Osupport of assembled printed circuit boards is defined. The circuitry includes a standard interface
through which instructions and test data are communicated. A set of test features is defined,
including a boundary-scan register, such that the component is able to respond to a minimum set
5 K5 H7 w2 T' j6 j* rof instructions designed to assist with testing of assembled printed circuit boards. Also, a language
8 O0 Q; x0 f' I! s7 His defined that allows rigorous description of the component-specific aspects of such testability features.
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& E% n; m' Q' W0 F" h  v9 j" N9 k( ]Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
TAP, test, test access port, VHDL, VHSIC Hardware Description Language
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