CMOS多晶電容工藝誤差分析及設計研究 chn.pdf[簡]

sjhor

Design and Analysis of Technology Errors
. a9 G6 j. g" m* [for CMOS Poly-silicon Capacitor
ZHUZhang-ming ,YANGYin-tang , ZHANGChun-peng , FUXiao-dong
8 N" v% ~+ L0 H2 ^0 [  F. e(Microelectronics Institute ,XidianUniversity,Xi’an 710071 , China)
Abstract : The technology errors of CMOS poly-silicon capacitor are analyzed .The effect of various errors introduced
during fabrication on CMOS poly-silicon capacitor is discussed .Based on the improved design of unit-capacitors , the
common-centroid floorplan of poly-silicon capacitor is presented . On the proposed capacitor design way , the CMOS
switch-capacitor bandpass filters is implemented using 0.6μmCMOSDPDMprocess .Themeasured results of filters show
that the proposed capacitor designway can be used to design high accuracy capacitors ,and applied to the design of submicro
) H% l. Q  T2 L+ Q+ q2 o5 Aand deep sub-micro analog integrated circuit .
6 G! O: A. E) [+ d' P: }
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[ 本帖最後由 sjhor 於 2007-5-17 10:37 PM 編輯 ]

k9966809

感謝分享 感謝感謝感謝

何建頫@FB

第一次看到這東西
下载來看看
Thkans

王可慶@FB

儘管上網查詢吸收這麼多 know how ' T4 i- l# T9 \* m# l2 y) J9 K! Y但沒有實際上戰場終究還是紙上談兵 4 Y6 n* R, y  ?0 [6 q6 h& i; c但還是謝謝版主無私分享

- P8 r" E7 C( Z! @; n- e. {- y

fredyentw

GooooooooooooooooooooooooooooooooooooooooooooooooooooD

fredyentw

good~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

k200630901

感謝大大的分享
目前正在學習
真是太感謝了!

xp212125o

感謝分享
先下載來看看
- ~, o) y& b# P3 o* T  S0 ?thank you very much~

fmgay

down下来看看，谢谢楼主。
8 a% j+ U! z$ m如果文章写的好我继续顶你

semico_ljj

论文里有layout图吗？最好不是一堆图表、数据！。。。。。

kevin

Thank you for sharing the materials

guweiru

这个东西好啊，还是第一次看见呢，下下来看看，感谢楼主

tanbo

正好在找電容相關的內容  看看是否能學到更多的知識

skygardon

好的，看看是否有用，這里的資料有的真的很特別啊，非常感謝哦！

liangshangquan

CMOS多晶電容工藝誤差分析及設計研究下来看看学习一下，应该还不错哦