Design of High-Voltage-Tolerant ESD

semico_ljj

Design of High-Voltage-Tolerant ESD Protection
Circuit in Low-Voltage CMOS Processes
* E. r& i" r. ^' s6 M0 @9 K
4 D+ b2 Q) p$ C; J+ U' \+ TIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009

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CHIP321

High-low Voltage-Tolerant IO,这种接口中文是怎么翻译的？多篇论文里提及，能否有大大帮忙解释下？
万分感谢。

ritafung

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009

4 r8 f4 D) C4 G- g這個是2009年嘛... 那麼快便有下載?
謝謝分享!