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回復 4# 的帖子
1. Using technology file to create a library! z a/ }* x4 @. d
2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.2 `& e& [" k( ]( P
3. Open new created library, and create some metal blockage if need.
+ J- }0 w$ s0 e! f0 v2 L4. Do smash if need.& e0 U/ i3 [2 Q5 E
5. remove some unnecessary extension txst. IE VDD ---> VDD& i0 }1 `5 J! @
6. Define power,ground as well as in/out port
# P. \5 K5 B; G& z. ^1 ^7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.
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The processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.
o6 g& G/ T3 [' {! |2 C-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?
% _( a; p/ J. e3 O8 c" l- ^I don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
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