IEEE Std 1149.1-2001 Test Access Port and Boundary-Scan Architecture

michaldl

Sponsor
Test Technology Standards Committee of the IEEE Computer Society
Approved 14 June 2001
" s: ^* {( X2 O8 ~2 }5 O1 e9 QIEEE-SA Standards Board
: R5 P2 [. ~; n& nAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
support of assembled printed circuit boards is defined. The circuitry includes a standard interface
, r$ i* _8 |! Y2 t3 Wthrough which instructions and test data are communicated. A set of test features is defined,
/ k/ y& H* A! b+ J1 c/ _2 ~including a boundary-scan register, such that the component is able to respond to a minimum set
of instructions designed to assist with testing of assembled printed circuit boards. Also, a language
( V2 P  Q0 d# K% ~' `& [! d* `: Vis defined that allows rigorous description of the component-specific aspects of such testability features.
( R1 ^* ?* G5 g' v8 x# Z
Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,
TAP, test, test access port, VHDL, VHSIC Hardware Description Language
2 c* |) }4 f& Z" F3 Z/ Z/ m

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