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請問一下VCCINT & VCCIO還有其對應的GND 這些腳位是做甚麼用的啊??" G' Z I, q2 u6 y. F3 Q
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我已經看我DATASHEET上對這方面的說明,但感覺還是有點不清楚
4 h4 d' Y- P# n2 D \感覺上VCCINT & VCCIO好像只需要各接一隻腳就可以了,其他相同名稱的腳位都是相通的.....
! Q% M9 `+ \2 Q: e8 k我的想法正確嗎??8 W# I! g5 p2 v4 L/ |7 w
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如果布正確的話....
* q0 O& M2 m% i- J [+ v# B& }能麻煩各位幫我做個詳細的解說嗎??
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先說聲謝謝~
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2 U% V* n, ?2 Z----------以下是DATASHEET針對VCCIO & VCCINT所做的說明------------2 k8 q! J* H3 a9 N! ^
& l, ~" j Y7 f5 a" u2 V4 ^MultiVolt I/O Interface6 h/ d/ i5 I2 W: y
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MAX 7000 devices—except 44-pin devices—support the MultiVolt I/O9 M- ^$ c# X. z; g$ z
interface feature, which allows MAX 7000 devices to interface with
6 v# C0 Y! Q0 m2 M3 S4 Ksystems that have differing supply voltages. The 5.0-V devices in all3 h% r- U/ K6 H) E+ n; L' H7 @5 ]
packages can be set for 3.3-V or 5.0-V I/O pin operation. These devices
$ K! I5 \7 ?0 q% P- I/ f7 A4 nhave one set of VCC pins for internal operation and input buffers
+ B5 v* j3 ?6 c0 D(VCCINT), and another set for I/O output drivers (VCCIO).. c9 F9 J: l9 i( U% c
The VCCINT pins must always be connected to a 5.0-V power supply.* j* i) H/ Q( U1 Y
With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and+ y6 }4 _# c6 \, a- U
are therefore compatible with both 3.3-V and 5.0-V inputs.
1 t! C# L( g. x) t( f- C2 Y3 [The VCCIO pins can be connected to either a 3.3-V or a 5.0-V power
8 B4 U! |1 X: Zsupply, depending on the output requirements. When the VCCIO pins are) V/ b$ Q" n4 W6 W' ?+ z) ]7 F
connected to a 5.0-V supply, the output levels are compatible with 5.0-V
s8 P: O9 U; Q- M, H( E& T8 lsystems. When VCCIO is connected to a 3.3-V supply, the output high is- S8 M) E. x5 B
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
* R) b! i: d* q# D3 L5 J1 B5 qoperating with VCCIO levels lower than 4.75 V incur a nominally greater0 L) |4 b8 z$ e- T' t
timing delay of tOD2 instead of tOD1./ b5 g# ]8 D0 S
+ J. N R# G: b0 g! y. l {3 x3 m[ 本帖最後由 jimcooper 於 2008-11-9 04:21 PM 編輯 ] |
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