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Cadence SoC Encounter 8.1 Update Seminar( y$ b2 F( T0 V6 s6 v) U' d
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/ E' t* ~) p( f想了解Encounter最新8.1 版本強大的新功能嗎? 想知道Encounter 8.1如何協助眾多設計成功案例嗎? 我們將展現Encounter如何讓您的晶片設計smaller, cooler & faster,也提供您處理大尺寸晶片設計的解決方案,趕快參加Cadence益華電腦免費的Encounter 8.1 Update 研討會吧。4 i" Z3 t+ ?5 G* r( Z0 `2 t" Y
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Nov. 14, 星期五: 09:00am – 13:30pm
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2 l8 y' j. j. d新竹國賓大飯店13F 會議室A&B (新竹市中華路二段188號)! H4 |( f; e9 T* p! Y
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5 { p3 V: u" z5 i名額有限,請即刻報名!(http://www.cadence.com/tw/events ... ion.aspx?eventid=16)
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1 V4 H% M# [7 E l09:00~09:30 / Registration
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9 P- g9 f) ~' m: l1 e09:30~09:40 / Automatic floorplan for design exploration to get the best result5 H1 q' V" `* _7 @$ B* {
7 z1 w% v6 w; C& `# v& {. h09:40~09:50 / Balanced clock tree to reduce process variation effects 1 J0 H3 Y2 Y2 K2 q$ }; S
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09:50~10:00 / 32nm support for the very advanced technology
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10:00~10:10 / Post route optimization and SI closure productivity
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0 e0 S: M9 E. K* C# K7 y10:10~10:20 / 100% MMMC support in the entire implementation flow, v/ s& i, j j7 E
! i3 e/ ?' V! A+ W10:20~10:30 / Dynamic power optimization and low power CTS for power reduction
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10:30~10:50 / Break
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. s( Q1 c3 ^- P4 r% V+ q10:50~11:00 / Encounter Power System for new generation power integrity analysis 4 V8 L# o9 c. P
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11:00~11:10 / 3 very advanced statistic applications for better performance
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+ c7 u8 n5 s& \- O# e2 r" I11:10~11:20 / Active Logic Reduction Technology (ART) to handle big chips; o7 \* v/ o6 Q# ]8 t0 n: X4 A
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11:20~11:30 / Constant run time and memory usage improvements
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! Y5 Q( k7 i f/ Y) V11:30~11:40 / End-to-end parallel computing support$ _: z4 \" ?& W1 d8 e$ q7 [
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11:40~11:50 / Encounter Foundation Flow for ease of use and productivity gain% N5 X& I/ [/ _% f9 g6 e
! x6 e! o7 L- l11:50~12:00 / Ending
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