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| SH77722 (SH-NaviJ2) Specifications
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Type name! y: X$ l, T& J+ s: g/ l
| R8A77722DA01BGV
" f7 ^% h& a+ t; R2 T* ? | R8A77722DA02BGV. K# ]8 G+ V# M" c V& f! v8 _: u
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Power supply voltage* P6 @. Q5 L0 Z6 i6 o+ }' ~: n
| 1.15 to 1.3 V (internal),
1 k2 b" a0 D, T1 j# ]& d+ \3.3 V and 1.8 V (external)* L* `, ?6 m! q& f/ W8 O
| 1.2 to 1.35 V (internal),
. z `6 M1 k9 ^8 X* a5 T( d5 {, S3.3 V and 1.8 V (external)( \ F, k d0 ?" q% a# o
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Maximum operating frequency
! o& \6 x% C3 U- H+ }* a | 336 MHz# h# o; l6 R y0 d: Z% L
| 400 MHz
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Processing performance) W5 H9 d, }% l( F* Y* E
| 600MIPS, 2.3GFLOPS
i3 Z, w. s; d | 720MIPS, 2.8GFLOPS
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CPU core) t7 M* M9 i8 v* H
| SH-4A core
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On-chip RAM4 x) Q/ t [2 S- e4 Q) v, r; e, Z p
| ILRAM: 16 Kbytes
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Cache memory
! }- s: h6 Q" o8 l | 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data* ?1 F7 B& s! _+ E/ l
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External memory$ {5 h9 _" ~! u
| DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus
+ |0 O9 @' H! K- Z7 a H) A$ w7 p; p. e | DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus0 O3 m: P: B" I
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SRAM or ROM directly connected to extension bus/ g; ]9 J$ h1 @4 x5 {# a2 p# y
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Extension bus' n0 b8 I7 ^$ }8 B) k
| Address space: 64 Mbytes × 30 w& j9 B7 |- d) P3 I: f
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Main on-chip peripheral functions$ [8 c% z, a, ~0 s% E
| Renesas Graphics processor(2D/3D)0 U% G* ~3 P* _0 e: F+ a
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Display control: outputs for two screens (digital RGB and LVDS)' W' N/ ~0 [, d: E
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Video input interface+ S3 `$ s4 r( o: K
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SD card host interface × 2 channels
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USB 2.0 host/function interface
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FM multiplex decoder+ B# n! S. R( L
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Controller area network (RCAN) interface × 2 channels
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MOST interface module
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Various audio interfaces × 4 channels. v, z, T/ D2 Z. x
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Dedicated DMAC × 26 channels) D) j# U$ Q* ]
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I2C bus interface × 2 channels6 k* d, v+ y* i& _
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Serial communication interface (SCIF) × 8 channels
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Remote control interface × 1 channel
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A/D converter (10-bit) × 4 channels
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Timer × 9 channels+ @) {! o, W, A
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On-chip debugging function8 ^# R1 z* V* _" ~; t3 C
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Interrupt controller (INTC)
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Clock pulse generator (CPG): built-in PLL frequency multiplier
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Power-down modes
1 z+ M; ^& L) }2 N | Sleep mode
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Module standby mode" d* V" f$ A% i" L; I
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DDR-SDRAM power supply backup mode
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Package/ j+ G! a1 N8 Z/ b3 e
| 449-pin BGA (21 mm × 21 mm)
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