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[問題求助] 使用暫態分析模擬出phasenoise @ MMSIM701

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1#
發表於 2009-8-27 02:01:53 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
原文連結
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以下原文內容:  x; Z4 }$ [6 _) A- L* m

# ~: b9 c1 L+ r$ R, K- u" N7 bCalculating Large Signal Phase Noise Using Transient Noise Analysis7 n6 ^2 W, V5 o& t
By Alan Whittaker on March 26, 2009
: C  w# _8 a8 V# k3 d2 G7 c2 a5 e
) a! d0 f4 P+ W" CMy name is Alan Whittaker and I'm in Cadence's Custom IC Proliferation Group.  2 e2 H& z! D! T5 v  C" {* J
We support Cadence's Technical Field Organization (the AEs) and Cadence customers
" c* x( z$ ^: H$ Rduring the introduction and adoption of new and advanced EDA technologies.  I'll , @- ~# u! ^! {* P
be posting here from time to time on methodologies and tool features that & w( h) z* Q' v5 d2 z
resolve issues that users have run into during the front-end analog, RF and
6 {1 v; @7 f0 B0 Amixed-signal design process.
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I'm first going to address how you can perform a large-signal phase noise $ a3 z9 x) N. T$ Y9 ~, z6 e) ]
analysis on a design block such as a VCO using our transient noise analysis
" h: t3 O0 G4 a4 P3 ucapability in our Spectre circuit simulator.  This approach is in addition to 9 H! O( V) N# V' `0 t* X
our small signal phase noise analysis which is available using either pnoise 9 z; Y7 z* G4 a1 F7 @1 Z
or hbnoise analysis in the SpectreRF option to Spectre.
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+ V- I+ K3 F( B/ R5 sHere are the steps to obtain a phase noise plot from transient noise analysis:+ j: q/ U" j: H# F
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1.  Set up your oscillator testbench circuit for a transient noise analysis
9 ~$ a/ u( E8 `7 N(See sourcelink for the Transient Noise appNote - it doesn't discuss the phase * x( ~7 p% l# b% |) T: S7 Y1 J
noise measurement, but describes how to properly set up the simulation analysis
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2.  Add the block freq_meter from the pllMMLib library . y3 }) ?6 K4 E  ^: e
($CDSHOME/tools//dfII/samples/artist/pllMMLib) & M1 J' D, S0 s
to the testbench circuit. Important: The instance name for this block must be 8 j( V( n& W3 o# |9 ~6 r
'vco_freq'.% b( d. H% p7 ~) c
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If the oscillator output is differential, connect it to the vin_p and vin_n
6 s" V2 r& F# z. L% M  V* v6 u+ Vpins on the freq_meter block. If the oscillator output is single ended, connect
! Q: O: d; W: P. Z/ S9 Eit to the vin_p pin and connect the vin_n pin to ground. Connect a noConn cell 4 v6 A$ g( k; n5 e' a
from the basic library to the out_freq pin.
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2#
 樓主| 發表於 2009-8-27 02:07:34 | 只看該作者
The parameters for this block are (set Tools Filter to veriloga in the CDF
+ }. u$ b, |4 K3 z1 o7 B' qparameter form:; _, T# U# T4 l0 ^7 G5 b
    *1 ^* E, c0 m, x0 q- j" m4 E+ ^
      Vthup: Threshold voltage to determine the rise edge of the input waveform. ( N5 _4 j0 Y( l
The input waveform period is determined by two adjacent rise edges. Default is 0. 6 ?; z: ~1 V" c* f+ m# p! z
    *: q8 X' E0 }+ L: o9 S
      ttol: The tolerance of the time where the rise edge is determined. Default 5 l0 M) Y, D" c, E; L
is 1p.6 h: z$ |7 n! v/ T, M- N
    *
" }1 m2 |5 e3 T9 H2 {! a) b9 @      outStart: The time-dependent period of the input waveform is output to the
; z, C* M% T2 wfile when the time is greater than outStart. Default is 0. To get accurate phase & i. X" D! s1 A) @8 R; J
noise measurements, set this to past the time when the oscillator is fully
# a8 i% E: _7 W2 `# \& G5 cpowered up and oscillating at the design frequency.) ?" ?3 [* H. {. G% U. k! W0 @+ ^
    *
& s; u6 v$ P, ?2 X      outfile: The name of a file to contain time-dependent periods for use in 3 |: i+ R, }* \. W
later psd calculations. Specify just the file name, not a path. If outfile is
8 K3 D9 w) T! {+ @* [- r3 s# x1 ^: Z3 Eleft blank, the default name is periods.txt.
3#
 樓主| 發表於 2009-8-27 02:11:04 | 只看該作者
3.  Before starting the simulation, in the ADE window, Select Tools->RF->LL. In the PLL Macro Model Wizard window, enable PLL Macro Model and select PLL Bench as the Bench Type. Then OK this form.
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4.  Run the simulation. The simulation must run successfully to completion in order to get to the phase noise results.
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5.  In the Direct Plot form for transient noise there should be a PLL PSD Noise option. This will allow you to plot the phase noise results. If a message appears saying that the PLL Noise PSD data is not available, check steps 3) and 4). If you make any corrections, you will need to re-run the simulation.1 L, a+ ^5 V# H: T. C6 }

: m' U3 m( j5 r  z$ aThe phase noise plot will extend from fmin = 4/tstop to fmax = fosc/2, where tstop is the transient noise simulation stop time and fosc is the oscillation frequency of the circuit.9 x5 g& f! [( h2 F

# `: `5 N; y+ m$ }% d& K. G5 O, zImportant note: You will need to use MMSIM701 and IC5141USR5 or IC613 (or latersubversions) to obtain a phase noise plot from transient noise analysis.
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我用的是mmsim620,也不能模。有人可以模擬出來的回個文,show個圖給大家看吧
4#
發表於 2009-9-24 17:41:38 | 只看該作者
show you my simulation result$ [( J4 M6 d: s" w- y# `4 t  J# W
!!!
& X* Q1 _) p2 |# F; n, \!!!!!!!!!!!
/ S& B5 G3 S, i0 J6 }!!!!!!

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5#
 樓主| 發表於 2009-9-25 16:46:23 | 只看該作者
謝謝你的回覆,我最近拿到新的軟體也開始在測試mmsim7了% G5 o+ C' x( c+ A/ D+ S" T
我發現turbo與multi thread的設定不同會對結果造成很大的不同。
3 I! M; i, y" N2 D還有這個phase noise的訊號的範圍跟transient noise的設定與transient 的設定都有很緊密的關係。
8 b. @/ n1 V; H, R不知道該怎麼作設定才是比較準確的
6#
發表於 2011-5-6 00:39:50 | 只看該作者
請問有更詳盡的使用方法嗎
7#
發表於 2011-5-26 15:02:19 | 只看該作者
也去试试这个流程。关于pll相噪仿真还有其他方法吗?
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