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Sponsor5 v. e; M( a* ^
Test Technology Standards Committee of the IEEE Computer Society. x) }( \2 }( S. D" w
Approved 14 June 20015 Y- x; A9 u; z2 V+ g% L
IEEE-SA Standards Board
+ M, _: }. r# J; r" [& q1 @; D+ zAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and
- j9 F& s& h8 i" Q* B% }! s8 N8 bsupport of assembled printed circuit boards is defined. The circuitry includes a standard interface) @8 `4 `7 J5 y+ P' w \
through which instructions and test data are communicated. A set of test features is defined,
+ z; b, k; W) @! K" Iincluding a boundary-scan register, such that the component is able to respond to a minimum set
+ O6 L& U: Q. L0 Mof instructions designed to assist with testing of assembled printed circuit boards. Also, a language
. C- @* i- W5 }: lis defined that allows rigorous description of the component-specific aspects of such testability features.
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Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language,5 R h- n) E6 B
boundary-scan register, BSDL, circuit boards, circuitry, integrated circuit, printed circuit boards,7 W- l, k0 r# E l3 O# I, Q- A& K: s
TAP, test, test access port, VHDL, VHSIC Hardware Description Language
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