STD Cell Data Prepare 中 wire track 的問題?

hgby2209

Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
5 m$ j1 T' v* R5 u然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack  
7 b" X5 @, I* u, {5 i之後卻有如下之 Meaasge:
1 K4 o. n( k- ]4 r9 P
******** Pin Access Analysis *******
** # Cell Masters    =  1000
** # Ports (logical) = 2500
6 i4 J( \0 E9 Y8 z3 C** # Pins (physical) = 2500
$ J  R& g5 K8 @; c4 b** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
** # Pins with no good access point on Ver-Grid =    5 ( 0%)

& x! j& f( G2 D, Y請問下面這兩句是代表什麼意思呢?
** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
, J0 |! c  x* o+ N0 Z! D- }** # Pins with no good access point on Ver-Grid =    5 ( 0%)
, d, ~2 u& V: O) s: x
若是代表有錯誤的話是否要 Fix 呢?