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Cadence SoC Encounter 8.1 Update Seminar/ s7 t5 G4 O1 L# h2 I, H
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7 u' W; Y1 J+ d4 S3 ]3 l- Y$ ^想了解Encounter最新8.1 版本強大的新功能嗎? 想知道Encounter 8.1如何協助眾多設計成功案例嗎? 我們將展現Encounter如何讓您的晶片設計smaller, cooler & faster,也提供您處理大尺寸晶片設計的解決方案,趕快參加Cadence益華電腦免費的Encounter 8.1 Update 研討會吧。7 `0 @) ^+ m7 M0 a7 ] T9 D
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時間:
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9 X# Q9 O- _" [ g! tNov. 14, 星期五: 09:00am – 13:30pm , v& c4 `! X7 T2 q- ^+ e
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& i) K8 {# ~( A% I( v; a( o8 O9 _新竹國賓大飯店13F 會議室A&B (新竹市中華路二段188號)8 \9 \0 h* r" j U: M- f3 Q
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名額有限,請即刻報名!(http://www.cadence.com/tw/events ... ion.aspx?eventid=16) 3 x* n! n9 b3 d5 R+ S4 E
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7 Q* {: ~$ j# T* d7 B+ t: g- W. Y09:00~09:30 / Registration
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O/ |& ~7 v" t09:30~09:40 / Automatic floorplan for design exploration to get the best result
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; E1 k) ^$ \) L# ~/ ^( A7 r09:40~09:50 / Balanced clock tree to reduce process variation effects 1 z% D# P6 g4 j( u
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09:50~10:00 / 32nm support for the very advanced technology
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10:00~10:10 / Post route optimization and SI closure productivity 8 p. p- m3 Q% j" I4 f$ Y2 T
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10:10~10:20 / 100% MMMC support in the entire implementation flow, j5 w- V6 ]: n7 |$ P' b$ A
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10:20~10:30 / Dynamic power optimization and low power CTS for power reduction5 @, ^( j2 I% J% G) P
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10:30~10:50 / Break
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10:50~11:00 / Encounter Power System for new generation power integrity analysis
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11:00~11:10 / 3 very advanced statistic applications for better performance " `; @% |; D6 k1 a( m7 }% o
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11:10~11:20 / Active Logic Reduction Technology (ART) to handle big chips/ k( I4 X' h% M
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11:20~11:30 / Constant run time and memory usage improvements
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/ g$ f4 J3 b, r& u( `. i) w11:30~11:40 / End-to-end parallel computing support3 r1 W, N6 p8 f( m* q/ {, E3 b+ F- K
/ L9 Y5 o+ q6 z$ |* q9 _+ A$ b11:40~11:50 / Encounter Foundation Flow for ease of use and productivity gain' C7 l( k4 `; ?
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11:50~12:00 / Ending 4 x" k- [6 T' |( ]4 k+ v. O) t
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12:00~13:30 / Lunch |
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