Item
+ ]. l. a% e* w/ l% k; | | SH77722 (SH-NaviJ2) Specifications9 M6 |2 q8 \. h4 W. P
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Type name7 ]0 w6 Q- s! B6 S/ }
| R8A77722DA01BGV
, g+ A1 H- }0 o | R8A77722DA02BGV
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Power supply voltage
8 ^4 X; q! h. h% c | 1.15 to 1.3 V (internal), . o% v9 T/ o4 C: S: O
3.3 V and 1.8 V (external)1 h2 c( H! R! ^
| 1.2 to 1.35 V (internal),
; t! [" |: ?$ g$ ~* \3 p9 u r4 K3.3 V and 1.8 V (external)
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Maximum operating frequency
7 u: c u3 m: o | 336 MHz
& j& V& H. k3 S4 J | 400 MHz& m/ z' L7 `6 |; O
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Processing performance2 d4 D' y" d! z7 A
| 600MIPS, 2.3GFLOPS
% S3 E) G( f$ \1 L( ^$ a( z | 720MIPS, 2.8GFLOPS
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CPU core
4 X* Y( [- Y; p/ \$ l4 y% H6 } | SH-4A core. t p& C5 j1 H# j1 { `( `
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On-chip RAM" q H$ A( f: }" X5 U
| ILRAM: 16 Kbytes
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Cache memory7 u7 @9 V( f; s
| 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data C7 a- ]( P. m: R' z
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External memory
9 M2 ]: ?) E2 H1 g9 x" d# W) k, f | DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus6 M* E# e) K7 S4 h/ U5 q
| DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus
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SRAM or ROM directly connected to extension bus( f, o m$ X5 W! N: F" M
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Extension bus: Y4 G' b# F1 d" d
| Address space: 64 Mbytes × 3
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Main on-chip peripheral functions
( X! ]2 z$ b7 W! m | Renesas Graphics processor(2D/3D)
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Display control: outputs for two screens (digital RGB and LVDS)
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Video input interface
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SD card host interface × 2 channels7 Z3 L, q; A0 Y( K, M
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USB 2.0 host/function interface9 g6 F5 @" w: K7 ]1 o# [: H
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FM multiplex decoder
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Controller area network (RCAN) interface × 2 channels
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MOST interface module. [( C! A; C+ @, P J
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Various audio interfaces × 4 channels
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Dedicated DMAC × 26 channels6 x2 L8 w7 A0 q; J
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I2C bus interface × 2 channels! @% F3 M9 C- R9 v# f
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Serial communication interface (SCIF) × 8 channels2 p" Y" o% S: _4 [
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Remote control interface × 1 channel
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A/D converter (10-bit) × 4 channels) D/ O% B& m" e$ x# t9 i* P: c
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Timer × 9 channels! s8 A. ~3 t& L! b" f h
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On-chip debugging function& C: }* g5 u4 d% |9 Y
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Interrupt controller (INTC)! f! Q$ {3 B+ m M, b1 k+ w7 F
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Clock pulse generator (CPG): built-in PLL frequency multiplier x0 K: d8 A$ z. t" p4 l/ ]3 q8 R
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Power-down modes7 _& J' o% w$ }6 O7 o" C
| Sleep mode
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Module standby mode* M. M& F: I. i# V/ K; M
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DDR-SDRAM power supply backup mode
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Package8 G4 Z+ d) }- Q1 w% o. E$ t
| 449-pin BGA (21 mm × 21 mm)
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